Over the last decade, gallium nitride (GaN) has emerged as an excellent material for the fabrication of power devices. Among the semiconductors for which power devices are already available in the market, GaN has the widest energy gap, the largest critical field, and the highest saturation velocity, thus representing an excellent material for the fabrication of high-speed/high-voltage components. The presence of spontaneous and piezoelectric polarization allows us to create a two-dimensional electron gas, with high mobility and large channel density, in the absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors, switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable a high-frequency operation, with consequent advantages in terms of miniaturization. For high power/high-voltage operation, vertical device architectures are being proposed and investigated, and three-dimensional structures—fin-shaped, trench-structured, nanowire-based—are demonstrating great potential. Contrary to Si, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This Tutorial describes the physics, technology, and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main properties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight into the most relevant aspects gives the reader a comprehensive overview on the present and next-generation GaN electronics.

https://hal.archives-ouvertes.fr/hal-03421528/document

GaN-based power devices: Physics, reliability, and perspectives

Today, the introduction of wide band gap (WBG) semiconductors in power electronics has become mandatory to improve the energy efficiency of devices and modules and to reduce the overall electric power consumption in the world. Due to its excellent properties, gallium nitride (GaN) and related alloys (e.g., AlxGa1−xN) are promising semiconductors for the next generation of high-power and high-frequency devices. However, there are still several technological concerns hindering the complete exploitation of these materials. As an example, high electron mobility transistors (HEMTs) based on AlGaN/GaN heterostructures are inherently normally-on devices. However, normally-off operation is often desired in many power electronics applications. This review paper will give a brief overview on some scientific and technological aspects related to the current normally-off GaN HEMTs technology. A special focus will be put on the p-GaN gate and on the recessed gate hybrid metal insulator semiconductor high electron mobility transistor (MISHEMT), discussing the role of the metal on the p-GaN gate and of the insulator in the recessed MISHEMT region. Finally, the advantages and disadvantages in the processing and performances of the most common technological solutions for normally-off GaN transistors will be summarized.

An Overview of Normally-Off GaN-Based High Electron Mobility Transistors.

The drain induced dynamic threshold voltage ( ${V}_{\textrm {th}}$ ) shift of a ${p}$ -GaN gate HEMT with a Schottky gate contact is investigated, and the underlying mechanisms are explained with a charge storage model. When the device experiences a high drain bias ${V}_{\textrm {DSQ}}$ , the gate-to-drain capacitance ( ${C}_{\textrm {GD}}$ ) is charged to ${Q}_{\textrm {GD}}$ ( ${V}_{\textrm {DSQ}}$ ). As the drain voltage drops to ${V}_{\textrm {DSM}}$ where ${V}_{\textrm {th}}$ is measured, ${C}_{\textrm {GD}}$ is expected to be discharged to ${Q}_{\textrm {GD}}$ ( ${V}_{\textrm {DSM}}$ ). However, the metal/ ${p}$ -GaN Schottky junction could block the discharging current, resulting in storage of negative charges in the ${p}$ -GaN layer. For the device to turn on, additional gate voltage is required to counteract the stored negative charges, resulting in a positive shift of ${V}_{\textrm {th}}$ . The dynamic ${V}_{\textrm {th}}$ shift is an intrinsic and predictable characteristic of the ${p}$ -GaN gate HEMT which is linearly correlated with $\Delta \!{Q}_{\textrm {GD}}={Q}_{\textrm {GD}}$ ( ${V}_{\textrm {DSQ}}$ ) $- {Q}_{\textrm {GD}}$ ( ${V}_{\textrm {DSM}}$ ). The ${V}_{\textrm {th}}$ shift is dependent on ${V}_{\textrm {DSQ}}$ as well as ${V}_{\textrm {DSM}}$ , indicating that the ${V}_{\textrm {th}}$ shift is varying along the load line during a switching operation.

Charge Storage Mechanism of Drain Induced Dynamic Threshold Voltage Shift in ${p}$ -GaN Gate HEMTs

The impacts of static and dynamic gate stress on the threshold voltage ( ${V}_{\text {TH}}$ ) instability in Schottky-type ${p}$ -GaN gate AlGaN/GaN heterojunction field-effect transistors are experimentally investigated. ${V}_{\text {TH}}$ shifts negatively under large positive bias static stress ( ${V}_{\text {G}}\_ {\text {stress}} > 5$ V) by adopting conventional quasi-static characterization techniques. In contrast, ${V}_{\text {TH}}$ under fast-dynamic-stress exhibits positive shift, and a positive frequency dependence occurs within a wide range of frequency from 10 Hz to 1 MHz. The different ${V}_{\text {TH}}$ instability behavior under static and dynamic stress mainly originates from the time-dependent charges (electrons and holes) storage/release mechanisms in the ${p}$ -GaN layer, which is floating in the Schottky-type ${p}$ -GaN gate HEMT.

V TH Instability of ${p}$ -GaN Gate HEMTs Under Static and Dynamic Gate Stress

Two-dimensional electron gases in heterostructures

We investigate the impact of the gate contact on the threshold voltage stability in p-GaN gate AlGaN/GaN heterojunction field-effect transistors with double pulse measurements on the p-GaN gate devices and device simulations. We find that, under gate stress, in the case of high-leakage Schottky contact, a negative threshold voltage shift results from hole accumulation in the p-GaN region. Conversely, in the case of low-leakage Schottky contact, hole depletion in the p-GaN region gives rise to a positive threshold voltage shift. More generally, we show that an imbalance between the hole tunneling current through the Schottky barrier and the thermionic current across the AlGaN barrier results in a variation of the total charge stored in the p-GaN region, which in turn is responsible for the observed threshold voltage shift. Finally, we present a simplified equivalent circuit model for the p-GaN gate module.

Threshold Voltage Instability in p-GaN Gate AlGaN/GaN HFETs

An analysis of hot-electron (HE) effects on the dynamic resistance ( ${dR}\,_{\mathrm{\scriptstyle ON}}$ ) of AlGaN/GaN high-electron-mobility transistors (HEMTs) when subject to semi-ON stress is reported and compared with OFF-state stress. This is carried out using measurements and TCAD 2-D hydrodynamic simulations. Two structures with different distances between the highly carbon-doped buffer region and the two-dimensional electron gas (2DEG) are here considered. The additional ${dR}\,_{\mathrm{\scriptstyle ON}}$ in semi-ON is attributed to HEs trapping at the passivation/AlGaN interface. TCAD simulations are performed and compared with experimental results.

Hot-Electron Effects in AlGaN/GaN HEMTs Under Semi-ON DC Stress

Hot electron trapping can significantly modify the performance of GaN-based HEMTs during hard switching operation. In this letter, we present a physics-based model based on rate equations to model the trapping kinetics of hot-electrons in GaN transistors submitted to semi- ON-state stress. The model is validated through comparison with the experimental data, obtained by means of a pulsed-drain current transient setup developed ad-hoc. Hot-electron trapping is found to have logarithmic time dependence; the first 10 $\mu \text{s}$ of operation are critical in determining the current collapse during stress.

A Physics-Based Approach to Model Hot-Electron Trapping Kinetics in p-GaN HEMTs

The goal of this paper is to advance the understanding of the impact of hard switching on the dynamic performance of GaN-based HEMTs. To this aim, we developed a fast (10 V/ns) on-wafer system for testing devices in hard switching. The system has been used to study the reliability of several WG = 2 mm p-type GaN HEMTs with different LGD or buffer properties. First, we show that by optimizing the drain node capacitance, we can speed-up the hard-switching transition to a few ns, even on-wafer level. Second, repeating the experiment by using multiple frequencies, from 1 kHz to 100 kHz, we demonstrate that, in real-world applications, cumulative turn-on stress has a much stronger effect on RON compared to off-state stress. Third, by comparing the results on identical devices having shorter LGD, we pinpoint hot electrons as the main mechanism in the device degradation, ruling out the contribution of self-heating. Finally, by comparing three wafers with different processing conditions (different passivation, different buffer) we suggest that trapping phenomena related to hot electrons happen in ns time scale and that the properties of the buffer can significantly impact the dynamic performance of the devices in hard switching.

Sebastien Sicre

Papers

Threshold Voltage Instability in p-GaN Gate AlGaN/GaN HFETs

Hot-Electron Effects in AlGaN/GaN HEMTs Under Semi-ON DC Stress

A Physics-Based Approach to Model Hot-Electron Trapping Kinetics in p-GaN HEMTs

Cumulative Hot-Electron Trapping in GaN-Based Power HEMTs Observed by an Ultra-Fast (10V/ns) on-Wafer Methodology

Understanding the effects of off-state and hard-switching stress in gallium nitride-based power transistors