Showing papers by "Shengdong Zhang published in 2016"

Photoreactive and Metal-Platable Copolymer Inks for High-Throughput, Room-Temperature Printing of Flexible Metal Electrodes for Thin-Film Electronics.

Abstract: Photoreactive and metal-platable copolymer inks are reported for the first time to allow high-throughput printing of high-performance flexible electrodes at room temperature. This new copolymer ink accommodates various types of printing technologies, such as soft lithography molding, screen printing, and inkjet printing. Electronic devices including resistors, sensors, solar cells, and thin-film transistors fabricated with these printed electrodes show excellent electrical performance and mechanical flexibility.

Solution-processed photodetectors based on organic-inorganic hybrid perovskite and nanocrystalline graphite.

Abstract: We present here solution-processed photodetectors based on a methyl ammonium lead iodide perovskite (MAPbI3) and nanocrystalline graphite (NCG) hybrid composite. The highest responsivity of the best MAPbI3/NCG photodetector was 795 mA W(-1) at 500 nm visible light, which is almost twice as high as that of the NCG-free MAPbI3 photodetector (408 mA W(-1)). The enhanced performance of the MAPbI3/NCG photodetector arises from the improved charge extraction at the MAPbI3/NCG interface. The dependence of photodetector performance on the mass percentage of NCG (the ratio of NCG to MAPbI3) in the hybrid materials is also reported here, and is correlated to the fabrication process. Moreover, by comparing the responsivity of the devices with different channel lengths, we show that the performance of hybrid photodetectors can be further tuned by tailoring the channel length.

One Gate Diode-Connected Dual-Gate a-IGZO TFT Driven Pixel Circuit for Active Matrix Organic Light-Emitting Diode Displays

Abstract: A dual-gate (DG) amorphous indium–gallium–zinc-oxide thin-film transistor (TFT)-driven pixel circuit for active-matrix organic light-emitting diode displays is presented. One gate of the DGs serves as a primary gate (PG) and the other as an auxiliary gate (AG). The threshold voltage ( $V_{\mathrm {{TH}}}$ ) of the DG TFT under the PG operation is modulated by the AG bias voltage. The $V_{\mathrm {{TH}}}$ variation ( $\Delta V_{\mathrm {{TH}}}$ ) is compensated with the AG and the drain diode-connected structure. The validity of the presented pixel circuit is experimentally verified. The measured current error rates are less than 3.2% at a $\Delta V_{\mathrm {{TH}}}$ of $\text {TFT} = \pm 0.5$ V and a $\Delta V_{\mathrm {{TH}}}$ of OLED = 0.5 V with the emission current ranging from 7 nA to $1.13~\mu \text{A}$ .

High-Performance Al–Sn–Zn–O Thin-Film Transistor With a Quasi-Double-Channel Structure

Abstract: We successfully fabricated high-performance Al–Sn–Zn–O thin-film transistors (ATZO TFTs) with a quasi-double-channel (QDC) structure on glass by radio-frequency magnetron sputtering. The bilayer ATZO films are fabricated with different oxygen partial pressures during the sputtering process. The structure of the top ATZO layer is optimized to improve OFF-state performances. With this QDC structure, the ATZO TFT demonstrates excellent electrical performances, including a low OFF-state current of 840 fA, an ON/OFF current ratio of $1.08 \times 10^{9}$ , a steep threshold swing of 0.16 V/decade, a superior saturation mobility of 108.28 cm $^{2}\text{V}^{-1}\text{s}^{-1}$ , and a threshold voltage of 2.09 V.

Analytical Drain Current Model for Amorphous InGaZnO Thin-Film Transistors at Different Temperatures Considering Both Deep and Tail Trap States

Abstract: Surface-potential-based drain current model is presented for amorphous InGaZnO thin-film transistors considering both exponential deep and tail trap states densities in the energy gap. The trap states densities are determined by the numerical calculation on the basis of the assumption that the trapped carrier concentration is much higher than the free carrier concentration. The analytical drain current model is developed consistent with the numerical calculation, and verified by the experimental data at different temperatures.

High-performance calcium-doped zinc oxide thin-film transistors fabricated on glass at low temperature

Abstract: High-performance calcium-doped zinc oxide thin-film transistors (Ca-ZnO TFTs) have been successfully fabricated on transparent glass at low temperature by RF magnetron sputtering. To study the effects of calcium doping on zinc oxide thin-film transistors, the characteristics of Ca-ZnO TFTs and ZnO TFTs are compared and analyzed in detail from different perspectives, including electrical performance, surface morphology, and crystal structure of the material. The results suggest that the incorporation of calcium element can decrease the root-mean-square roughness of the material, suppress growth of a columnar structure, and improve device performance. The TFTs with Ca-ZnO active layer exhibit excellent electrical properties with the saturation mobility (μsat) of 147.1 cm2 V−1 s−1, threshold voltage (V t) of 2.91 V, subthreshold slope (SS) of 0.271 V/dec, and I on/I off ratio of 2.34 × 108. In addition, we also study the uniformity of the devices. The experimental results show that the Ca-ZnO TFTs possess good uniformity, which is important for large-area application.

Amorphous Indium Tin Oxide Thin-Film Transistors Fabricated by Cosputtering Technique

Abstract: Amorphous indium tin oxide (a-ITO) thin-film transistors (TFTs) were fabricated with the channel layer deposited by the cosputtering of In2O3 and SnO2 ceramic targets. It is shown that the cosputter-deposited ITO film for the channel layer well keeps in the amorphous structure even after being annealed at 300° if the sputtering powers of the two targets are properly selected. The fabricated a-ITO TFTs in the cosputtering technique show a high device performance, including a field-effect mobility of 25.9 cm $^{2}\text{V}^{-1}\text{s}^{-1}$ , a subthreshold swing of 0.33 V/decade, an ON/OFF-current ratio of $> 1 \times 10^{9}$ , and a desirable threshold voltage variation range. In addition, an acceptable characteristic stability under electrical stress is also observed in the passivated and annealed a-ITO TFTs.

A Back-Channel-Etched Amorphous InGaZnO Thin-Film Transistor Technology With Al-Doped ZnO as Source/Drain and Pixel Electrodes

Abstract: A back-channel-etched fabrication process for amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors is proposed, in which an alumium-doped ZnO (AZO) transparent conductive film is used to form both source/drain and pixel electrodes. It is demonstrated that rinsed acetic acid solution has a high etching selectivity over 100:1 between AZO and a-IGZO. In addition, bus and interconnect lines are formed in a separate fabrication step in this process, so that the Cu process could be adopted without bringing contamination issue.

Indium–Tin–Oxide Thin-Film Transistors With In Situ Anodized Ta 2 O 5 Passivation Layer

Abstract: An in situ passivation process for the fabrication of high-performance indium-tin-oxide thin-film transistors (ITO TFTs) is demonstrated, in which a localized anodic oxidization (anodization) technique is used to convert the metal Ta film on a channel layer into a Ta2O5 film to form a channel passivation layer. At the same time, the high conductive ITO layer is modulated into an appropriate active layer due to filling of oxygen vacancies during the anodization. The fabricated ITO TFT shows a high mobility of 56.1 cm2/Vs, a proper threshold voltage of 1.7 V, a steep subthreshold slope of 0.14 V/decade, and a high ON/OFF current ratio exceeding $10^{9}$ . A good electrical stability under gate-bias stress is also observed with the ITO TFTs.

Display device and display driver

Abstract: The invention provides a display device and a display driver. The display driver comprises a pre-charging circuit and a pre-charging circuit control unit. The pre-charging circuit control unit is used for controlling the pre-charging circuit to carrying out charging or discharging on a data line within a first period according to a comparison result between a previous digital display signal and a currently inputted digital display signal, controlling the pre-charging circuit to stop charging or discharging on the data line after ending of the first period, controlling a data line drive circuit to disconnect the data line within the first period and connect the data line after ending of the first period, so that the signal of the data line approaches a target display signal. According to the invention, the data line is charged or discharged based on the comparison result between the previous digital display signal and the currently inputted digital display signal and then charged or discharged is carried out precisely by using the currently inputted digital display signal as a target signal. Therefore, establishment time of a display signal on a data line can be substantially shortened.

Structure and stoichiometry evolution of sputtered Nb doped TiO2 films induced by O2 pressure variation during postannealing process

Abstract: Nb doped TiO2 (TiO2:Nb) thin films are prepared by direct current magnetron sputtering on glass substrates followed by different O2 pressure postanneal at 300 °C. The proper postannealing O2 pressure ( PO2−anneal) prompts the crystallization of the as-deposited amorphous TiO2:Nb films and improves the electron mobility. High vacuum postanneal leads to weak crystalline TiO2:Nb films, while the TiO2:Nb films remain amorphous at high PO2−anneal. The average transmittance in the visible region increases monotonically with PO2−anneal due to the reduction of oxygen vacancy and reaches 81% when PO2−anneal is 20 Pa. However, an oxygen interstitial can be formed in O2 rich annealing atmosphere, which would result in the suppression of carrier concentration. The carrier concentration maximum (∼1.55 × 1021 cm−3) of the TiO2:Nb films is obtained when the PO2−anneal is 0.5 Pa.

P‐37: A High Accuracy Current Comparison Scheme for External Compensation Circuit of AMOLED Displays

Abstract: A current comparison scheme for external compensation circuit of AMOLED displays is proposed. In this scheme, a current comparator is designed to sense the difference between the reference current and the driving current of pixels and to output a corresponding digital signal to the compensation block. For the current comparator, a sense amplifier is used to amplify the current difference, which can effectively increase the accuracy of the current comparator. Simulation results show that the accuracy of the proposed current comparator is 1nA and the sensing error is lower than 0.224 %, when the reference current is 500 nA.

Pixel circuit, driving method therefor, and display device

Abstract: Provided is a pixel circuit. The pixel circuit comprises a driving transistor and a light-emitting element both coupled in series between a first level end and a second level end, and comprises a second transistor, a third transistor, a fourth transistor, a first capacitor and a second capacitor. The second capacitor is coupled between a control electrode of the driving transistor and a second end of the light-emitting element. A threshold voltage is stored by the first capacitor, so that threshold voltage compensation for the driving transistor and the light-emitting element is implemented, and therefore the non-uniformity of the display of the pixel circuit is compensated. Also provided is a display device, wherein a first control line and a light-emitting control line are both global lines. Also disclosed is a pixel circuit driving method.

Sn-doped ZnO thin-film transistors with AZO, TZO and Al heterojunction source/drain contacts

Abstract: Bottom gate, top contact thin-film transistors (TFTs) with transparent Sn-doped zinc oxide as the active layer have been fabricated on glass substrate at room temperature. Indium tin oxide, alumni zinc oxide (AZO) and Al thin films serve as the source/drain (S/D) electrode. It turns out that devices with AZO S/D electrodes exhibit preferable properties such as a saturation mobility of 13.6 cm2/Vs, a subthreshold slope of 381 mV/decade, a Vth of 3.47 V and an on/off current ratio of 3.1 × 107. Moreover, the superior output characteristic and lower parasitic resistance demonstrate the excellent contact performance of the tin-zinc oxide TFTs with AZO S/D electrodes.

High-performance fully transparent Al–Sn–Zn–O thin-film transistors using double-channel structures

Abstract: We successfully fabricated the fully transparent Al–Sn–Zn–O thin-film transistors (ATZO TFTs) on glass by RF magnetron sputtering, and then the electrical performances of the ATZO TFTs are optimized with double-channel structures. The double-channel structures are formed by using bilayer ATZO films fabricated successively with different oxygen partial pressure in the sputtering process. The operation mechanism for double-channel structures were clarified. Owing to the double-channel structure, the ATZO TFT demonstrates excellent electrical performances, including a high ON/OFF current ratio (I on /I off) of 1.1 × 108, a steep threshold swing SS of 266.3 mV/decade, a superior saturation mobility μ sat of 134.1 cm2/Vs, and a threshold voltage V T of 1.2 V.

Controllable voltage source, shift register and unit thereof, and display

Abstract: A controllable voltage source, comprising a control module (1), a storage module (2) and an output module (3); the control module (1) is coupled between a high level end and a low level end; the storage module (2) comprises a storage capacitor; two ends of the storage capacitor are respectively coupled to the control module (1) to form a first terminal and a second terminal; the output module (3) is coupled to the second terminal, and the signal output end thereof is used to output to an external circuit the voltage signal of the controllable voltage source; the control module (1) responds the effective level of a first clock signal so as to enable the first terminal to be coupled to the high level end, and the first terminal is charged from the high level end; the control module (1) responds the effective level of a second clock signal so as to enable the second terminal to be coupled to the high level end, and the second terminal is charged from the high level end; and the first terminal is coupled to the low level end and discharges via the low level end. The effective level of the first clock signal does not overlap with the effective level of the second clock signal. Also disclosed are a shift register and unit thereof, and display based on the controllable voltage source.

A new AC biased pixel circuit for active matrix organic light-emitting diode displays

Abstract: This work presents a new pixel circuit and driving scheme for active-matrix organic light-emitting diode (AMOLED) displays, where the OLED is under AC bias. The proposed pixel circuit consists of five thin film transistors (TFTs) and one capacitor. Due to the AC bias, the OLED is reverse biased during the non-emission period, which not only prevents the OLED from light emitting during the programming period to ensure a high contrast ratio displays; but also suppresses the OLED degradation and thus extends the lifetime of the AMOLED displays. It is verified that the proposed circuit can compensate for the threshold voltage variations of the driving TFT and the OLED.

Estimation of threshold voltage shift in a-IGZO TFTs under different bias temperature stress by improved stretched-exponential equation

Abstract: In this work, we study threshold voltage (V th ) shift degradation in amorphous IGZO (a-IGZO) TFTs. The TFTs employ the bottom-gate staggered structure with an etch stopped layer. An improvement is presented to well known stretched-exponential equation for the V th shift, and a systematic extraction method is provided. The V th shift in a-IGZO TFTs is estimated quantitatively under different gate bias stress and temperature. Good agreements are obtained between calculated results and measured data.

Effects of various oxygen partial pressures on Ti-doped ZnO thin film transistors fabricated on flexible plastic substrate

Abstract: By applying a novel active layer of titanium zinc oxide (TiZO), we have successfully fabricated fully transparent thin-film transistors (TFTs) with a bottom gate structure fabricated on a flexible plastic substrate at low temperatures. The effects of various oxygen partial pressures during channel deposition were studied to improve the device performance. We found that the oxygen partial pressure during channel deposition has a significant impact on the performance of TiZO TFTs, and that the TFT developed under 10% oxygen partial pressure exhibits superior performance with a low threshold voltage (V th) of 2.37 V, a high saturation mobility (μsat) of 125.4 cm2 V−1 s−1, a steep subthreshold swing (SS) of 195 mV/decade and a high I on/I off ratio of 3.05 × 108. These results suggest that TiZO thin films are promising for high-performance fully transparent flexible TFTs and displays.

Photoelectric sensor and display panel

Abstract: A photoelectric sensor and a display panel comprise: a pulse transmission unit comprising a control node, after obtaining a driving voltage, the control node of the pulse transmission unit transmitting first clock signals to a signal output terminal; a pulse control unit configured to receive scanning signals from a signal input terminal and charging the control node of the pulse transmission unit so as to provide the driving voltage; and photoelectric sensing unit configured to provide a leakage current in response to the intensity of external illumination when receiving the external illumination, the leakage current discharging the control node of the pulse transmission unit, so that the voltage at the control node of the pulse transmission unit is less than the driving voltage after a period of time. The circuit of the photoelectric sensor utilizes the existing scanning signals and clock signals of a conventional display panel, with no need for an extra control signal, and therefore the circuit is simple in structure, and more suitable for being integrated on the display panel.

Organic light emitting diode panel, gate driver circuit and unit thereof

Abstract: An organic light emitting diode panel, a gate driver circuit and a gate driver circuit unit are disclosed, where the gate driver circuit includes a scanning signal generating unit for generating a scanning signal, transmitting a first clock signal to a scanning signal output terminal under the control of a pulse signal, and pulling down and maintaining the voltage of the scanning signal output terminal at a low voltage level under the control of a second clock signal. The gate driver circuit unit also includes a light emitting signal generating unit for generating a light emitting signal, pulling down the voltage of the light emitting signal output terminal under the control of the pulse signal, and charging the light emitting signal output terminal under the control of the second clock signal.

A floating high-voltage level shifter used in a pre-charge circuit for large-size AMOLED displays

Abstract: In this paper, we propose a floating high-voltage level shifter without static power consumption which is used in a pre-charge circuit for large-size active matrix organic light-emitting diode (AMOLED) displays. The proposed level shifter is a high voltage tolerant level shifter with only middle-voltage transistors which operate within the voltage limits. No high-voltage transistors make it occupy less silicon areas. In addition, the proposed level shifter can achieve floating shift behavior without the threshold loss suffered by the conventional high-voltage level shifter. The circuit is simulated in 0.18um CMOS process through Cadence. We analyze the circuit over different process corners and the simulation results show a rising time of 2.13ns and a falling time of 1.58ns typically.

Gate driving circuit, unit thereof, and display device

Abstract: A gate driving circuit comprises at least one cascaded gate driving circuit unit. A low-level maintaining enabling end (P) of the gate driving circuit unit is connected to an adaptive voltage generation module (40). The adaptive voltage generation module (40) generates a self-compensation voltage according to a constant current source of the adaptive voltage generation module (40) and transmits the self-compensation voltage to the maintaining enabling end (P) so as to provide an effective level to the maintaining enabling end (P). Because a threshold voltage shift that occurs on a pull-down transistor in a low-level maintaining module (30) is embodied at the maintaining enabling end (P), the adaptive voltage generation module (40) generates a self-compensation voltage according to a threshold voltage under the action of a constant current source of the adaptive voltage generation module (40), and therefore the increase of the threshold voltage can be compensated, the overdrive voltage of the pull-down transistor is constant, and a good pull-down capability can be maintained, thereby pronging the service life of the gate driving circuit.

High reliability of IGZO TFTs using low-temperature fabricated organic passivation layers

Abstract: We proposed and fabricated amorphous indium-gallium-zinc-oxide thin-film transistors (IGZO TFTs) employing a novel organic-passivation layer (1-Methoxy-2-Propanol positive resist). The 1-Methoxy-2-Propanol passivated TFTs exhibit almost non-degraded electrical properties with carrier mobility, subthreshold swing of 5.9 cm2/Vs, 0.38 V/dec, respectively compared to the unpassivated TFTs. Besides, the Vth shift of 1-Methoxy-2-Propanol passivated TFTs under negative bias stress (NBS) is remarkably reduced compared to the unpassivated TFTs and the hump effect disappears. What is more, the passivation layer was fabricated at low temperature. Therefore, it is a promising candidate for advanced flexible displays.

Oxygen partial pressure and annealing temperature influence on the performance of back-channel-etch zinc tin oxide thin film transistors

Abstract: Zinc tin oxide (ZTO) thin film transistors (TFTs) with back-channel-etch (BCE) structure are demonstrated. The influence of oxygen partial pressure during ZTO layer sputtering is discussed and an optimal O 2 /Ar ratio of 1% is achieved. The effect of annealing temperature is studied and the device annealed at 300°C performs well. The wet etching of Mo source/drain electrodes is carried out in Mo etchant which shows little damage to ZTO layer. The BCE ZTO TFT exhibits a field effect mobility of 1.88 cm2V−1s−1, a subthreshold slope of 0.37V/decade, and an on-off current ratio larger than 107. The comparable performances between BCE ZTO TFT and lift-off ZTO TFT indicate back-channel-etch ZTO TFT is a feasible technique and suitable for mass production.

Comparison of N 2 and ar plasma treatment for source/drain formation in self-aligned top-gate amorphous InGaZnO thin film transistor

Abstract: We propose a self-aligned top-gate amorphous InGaZnO thin film transistor (a-IGZO TFT) with source/drain treated by N 2 plasma. By comparing the performances of the self-aligned top-gate a-IGZO TFTs with N 2 and Ar plasma treatment, it is found that N 2 plasma treatment can effectively decrease the resistivity of the a-IGZO. The TFTs with N 2 plasma treated source/drain have the comparable electrical performance and superior stress stability compared to the Ar plasma treated one. The fabricated self-aligned top-gate a-IGZO TFT with N 2 plasma treatment exhibits field-effect mobility of 5.1cm2/V·s, threshold voltage of −0.33 V, a subthreshold swing of 0.26V/dec, and a shift of V th of −0.65 V and 0.52 V under PBS and NBS with gate-bias stress voltage of+30V respectively.