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Thomas Kauerauf
Researcher at Katholieke Universiteit Leuven
Publications - 110
Citations - 2707
Thomas Kauerauf is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: Gate dielectric & Time-dependent gate oxide breakdown. The author has an hindex of 29, co-authored 109 publications receiving 2608 citations.
Papers
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Journal ArticleDOI
Origin of the threshold voltage instability in SiO 2 /HfO 2 dual layer gate dielectrics
A. Kerber,E. Cartier,Luigi Pantisano,Robin Degraeve,Thomas Kauerauf,Y. Kim,A. Hou,Guido Groeseneken,Herman Maes,Udo Schwalke +9 more
TL;DR: In this paper, a simple defect model is proposed that can explain the complex behavior of the V/sub T/ instability in terms of structural defects as follows: a defect band in the HfO/sub 2/ layer is located in energy above the Si conduction band edge.
Proceedings ArticleDOI
Ultra low-EOT (5 Å) gate-first and gate-last high performance CMOS achieved by gate-electrode optimization
Lars-Ake Ragnarsson,Zilan Li,J. Tseng,Tom Schram,E. Rohr,Moon Ju Cho,Thomas Kauerauf,Thierry Conard,Y. Okuno,Bertrand Parvais,Philippe Absil,Serge Biesemans,T. Y. Hoffmann +12 more
TL;DR: In this article, a zero interface layer and optimized gate-electrode are used to achieve ultra low EOT and Tinv values of ∼5 A and ∼8 A respectively for both n and pMOS devices.
Proceedings ArticleDOI
Characterization of the V/sub T/-instability in SiO/sub 2//HfO/sub 2/ gate dielectrics
A. Kerber,Eduard A. Cartier,Luigi Pantisano,Maarten Rosmeulen,Robin Degraeve,Thomas Kauerauf,Guido Groeseneken,H.E. Maes,Udo Schwalke +8 more
TL;DR: In this article, time-resolved measurement techniques down to the /spl mu/s time range are applied to capture the fast transient component of the charge trapping observed in SiO/sub 2/HfO/ sub 2/ dual layer gate stacks.
Journal ArticleDOI
Low Weibull slope of breakdown distributions in high-k layers
TL;DR: In this paper, the reliability of various gate oxide double layers with a thickness from 3 nm to 15 nm and TiN gate electrodes was studied by measuring time-to-breakdown using gate injection and constant voltage stress, and the Weibull slope /spl beta/ of the breakdown distribution is found to be below 2 and shows no obvious thickness dependence.
Proceedings ArticleDOI
A comprehensive reliability investigation of the voltage-, temperature- and device geometry-dependence of the gate degradation on state-of-the-art GaN-on-Si HEMTs
Denis Marcon,Thomas Kauerauf,Farid Medjdoub,J. Das,M. Van Hove,Puneet Srivastava,Kai Cheng,Maarten Leys,Robert Mertens,Stefaan Decoutere,Gaudenzio Meneghesso,Enrico Zanoni,Gustaaf Borghs +12 more
TL;DR: In this article, the gate degradation of GaN-based HEMTs is analyzed and the time-to-failure can be fitted best with a Weibull distribution by using the distribution parameters and a power law model.