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Showing papers by "Veena Misra published in 2006"


Journal ArticleDOI
TL;DR: In this article, the impact of heavy boron doping on the biaxial compressive strain in Si1−xGex layers grown on Si has been investigated using Raman spectroscopy and theoretical calculations.
Abstract: The impact of heavy boron doping on the biaxial compressive strain in Si1−xGex layers grown on Si has been investigated using Raman spectroscopy and theoretical calculations. It is shown that one boron atom is sufficient to compensate the strain due to approximately 6.9 Ge atoms. This effect is appreciably large for boron concentrations as low as 1%, typical for applications, which employ heavily boron doped layers. Using strain compensation, the Ge content can be substantially increased without increasing the stored strain energy. This phenomenon can be useful in applications, which require low-resistivity p-type strained Si1−xGex layers with high Ge content.

32 citations


Journal ArticleDOI
TL;DR: In this paper, an interface dipole is formed at the gate electrode and dielectric interface for tuning the metal gate effective work function via interface dipoles formed using AlTa and AlTaN alloys.
Abstract: This letter presents a route for tuning the metal gate effective work function via interface dipoles formed using AlTa and AlTaN alloys. It was found that the AlTa alloy has a higher effective work function (4.45 eV) compared to either Al (~ 4.1 eV) or Ta (4.2 eV) gates on SiO 2 at 400 degC. This increase in effective work function was attributed to interface dipoles formed at the gate electrode and dielectric interface. The origin of this dipole is attributed to a reaction between the AlTa alloy and the dielectric layer. Similar AlTa effective work function tuning was also observed on high-k dielectrics. However, since the AlTa alloy is not thermally stable on SiO2, nitrogen was added to stabilize the electrode. The addition of N stabilizes the equivalent oxide thickness while still allowing for work function tuning under high temperatures. AlTaN alloys were deposited by reactive sputtering and resulted in an effective work function of ~ 5.1 eV after a 1000 degC anneal, making them suitable for PMOS gate applications

23 citations


Journal ArticleDOI
TL;DR: In-plane anisotropic nanostructures have been fabricated using deep ultraviolet (UV) lithography using one mask by the over-exposure technique as discussed by the authors, and they have been transferred to a substrate to create magnetic films containing dots and antidots.
Abstract: In-plane anisotropic nanostructures have been fabricated using deep ultraviolet (UV) lithography. Dimensions from over 100 nm down to 50 nm with periods of 300 nm for a diamond shape and 159 nm for a triangular shape can be obtained using one mask by the over-exposure technique. Patterns transferred to a substrate to create magnetic films containing dots and antidots have been demonstrated. Hysteresis loop measurements proved higher coercivity for patterned films compared with continuous film.

16 citations


Journal ArticleDOI
TL;DR: In this article, redox-active molecular monolayers were incorporated in silicon MOSFETs to obtain hybrid silicon/molecular FETs, which can be used for lowvoltage, multiple-state memory and logic applications and can extend the impact of silicon based technologies.
Abstract: Redox-active molecular monolayers were incorporated in silicon MOSFETs to obtain hybrid silicon/molecular FETs. Cyclic voltammetry and FET characterization techniques were used to study the properties of these hybrid devices. The redox-active molecules have tunable charge states, which are quantized at room temperature and can be accessed at relatively low voltages. The discrete molecular states were manifested in the drain current and threshold voltage characteristics of the device, confirming the presence of distinct energy levels within the molecules at room temperature. This study demonstrates the modulation of Si-MOSFETs' drain currents via redox-active molecular monolayers. The single-electron functionality provided by the redox-active molecules is ultimately scalable to molecular dimensions, and this approach can be extended to nanoscale field-effect devices including those based on carbon nanotubes. The molecular states coupled with CMOS devices can be utilized for low-voltage, multiple-state memory and logic applications and can extend the impact of silicon-based technologies.

14 citations


Journal ArticleDOI
TL;DR: In this article, the MoTa solid solution can achieve low work function values and is stable up to 900°C on SiO 2 under high-temperature anneals and no metal diffusion into substrate Si channel was detected.
Abstract: This article presents Mo x Ta v as a potential candidate for dual metal complementary metal oxide semiconductor (CMOS) applications. The electrical characterization results of MoTa alloy indicates that the effective work function can be controlled to around 4.3 eV on SiO 2 and is suitable for n-type MOS gate electrode application. The MoTa alloy forms a solid solution instead of an intermetallic compound. We report that the MoTa solid solution can achieve low work function values and is stable up to 900°C. X-ray diffraction results indicated only a single MoTa alloy phase. X-ray photoelectron spectroscopy analysis confirmed that no Mo-Ta compound bonding formed within the MoTa alloy. Moreover, from Auger electron spectroscopy and Rutherford backscattering spectroscopy analysis, MoTa was found to be stable on SiO 2 under high-temperature anneals and no metal diffusion into substrate Si channel was detected. This indicates that Mo x Ta y is a good candidate for CMOS metal gate applications.

12 citations


Journal ArticleDOI
TL;DR: In this article, Ru and W capping layers for MoTa metal gate electrodes in MOS capacitor applications were evaluated and it was shown that the oxygen diffusion from the capping layer plays an important role in determining the MoTa alloy effective work function value on SiO/sub 2.
Abstract: This letter evaluates Ru and W capping layers for MoTa metal gate electrodes in MOS capacitor applications. The authors report that the oxygen diffusion from the capping layer plays an important role in determining the MoTa alloy effective work function value on SiO/sub 2/. A MoTa alloy metal gate with Ru capping exhibits stable effective work function up to 900/spl deg/C annealing but is not stable with W capping. Auger electron spectroscopy and Rutherford backscattering spectroscopy analyses show minimal oxygen diffusion into MoTa gate stacks with Ru capping while severe oxygen diffusion into the gate is observed with W capping metal after 900/spl deg/C annealing. Current-voltage analysis also demonstrates different barrier heights of MoTa on SiO/sub 2/ with Ru or W capping layer after 900/spl deg/C annealing, confirming the effective work function value change.

9 citations


Journal ArticleDOI
20 Oct 2006
TL;DR: In this paper, the reliability and lifetime characteristics of lanthanum silicate have been largely unstudied, due to the propensity of La to form hydroxides and carbonates.
Abstract: Lanthanum silicate has many properties making it promising as a high-k gate dielectric for CMOS or advanced capacitor applications. For example, the amorphous phase has good high temperature stability, and the reaction of La2O3 with SiO2 has proven a means of eliminating interface SiO2 after low temperature processing; resulting in MIS devices with a combination of low EOT values (~0.63 nm) and low leakage at Vfb+1 (~0.1 A/cm). However, reliability and lifetime characteristics of lanthanum silicate have been largely unstudied. These are important specifically for lanthanum silicate due to the propensity of La to form hydroxides and carbonates.

7 citations


Journal ArticleDOI
TL;DR: In this paper, the high-temperature stability of lanthanum silicate gate dielectric metal-insulator-semiconductor (MIS) devices with either Ta or TaN electrodes has been studied.
Abstract: The high-temperature stability of lanthanum silicate gate dielectric metal-insulator-semiconductor (MIS) devices with either Ta or TaN electrodes has been studied. After a 1000°C, 10 s rapid thermal annealing (RTA) treatment, devices with Ta gate metal undergo an equivalent oxide thickness (EOT) increase from 0.62 to 1.57 nm or higher, while devices with TaN as the gate electrode experience an EOT increase from 0.62 to only 1.12 nm. An EOT less than 1.0 nm is achieved after a 5 s 1000°C RTA, with a corresponding gate leakage of 0.1 A/cm 2 . Medium-energy ion scattering and X-ray diffraction (XRD) analysis reveal that the Ta gate metal undergoes a phase change due to reaction with N 2 above 800°C, while for TaN no change in the XRD spectrum is detected. Interface state defect densities and leakage currents are reduced after the high-temperature processing. Results reveal the importance of the entire gate stack design and processing in obtaining good device properties.

6 citations


Patent
30 Nov 2006
TL;DR: In this article, an article of manufacture comprises a substrate; a molecular layer on the substrate comprising at least one charge storage molecule coupled to the substrate by a molecular linker; a solid barrier dielectric layer directly on the molecular layer; and a conductive layer directly in the solid barrier layer.
Abstract: According to some embodiments, an article of manufacture comprises a substrate; a molecular layer on the substrate comprising at least one charge storage molecule coupled to the substrate by a molecular linker; a solid barrier dielectric layer directly on the molecular layer; and a conductive layer directly on the solid barrier dielectric layer. In some embodiments, the solid barrier dielectric layer is configured to provide a voltage drop across the molecular layer that is greater than a voltage drop across the solid barrier dielectric layer when a voltage is applied to the conductive layer. In some embodiments, the molecular layer has a thickness greater than that of the solid barrier dielectric layer. The article of manufacture contains no electrolyte between the molecular layer and the conductive layer.

4 citations




Journal ArticleDOI
TL;DR: In this article, the surface work function of Ru and Re on MOS capacitors with Ru metal gates on HfO 2 gate dielectric was investigated and the results indicated that the oxygen content at metal/high-k interface plays an important role in governing the effective work function.
Abstract: In this work we have performed Ultraviolet Photoelectron Spectroscopy (UPS) and X-Ray Photoelectron Spectroscopy (XPS) on: (i) 40A of Ru deposited on 20A of ALD-HfO2 (Ru-HfO2), (ii) 40A of Re deposited on 20A of ALD-HfO 2 (Re-HfO 2 ), and (iii) 40A of W deposited on 20A of ALD-HfO2 (W-HfO 2 ) in as deposited as well as after 600˚C in-situ anneal exposure. The samples with Ru and Re indicated significant reduction in the oxygen content and shift in the Hf peaks towards higher binding energy after anneal as compared to the as deposited state. The loss of oxygen after anneal was associated with the reduction in the surface work function of Ru and Re measured by UPS. However, the sample with W showed a redistribution of oxygen after anneal leading to the formation of multiple oxides of W having a net higher surface work function. The spectroscopic measurements were correlated with the electrical measurements made on MOS capacitors with Ru metal gates on HfO 2 gate dielectric. The results indicated that the oxygen content at metal/high-k interface plays an important role in governing the effective work function of Ru on HfO 2 gate dielectric.

Journal ArticleDOI
TL;DR: In this article, the effect of boron concentration on the critical thickness of Si1−x−yGex alloys has been studied using Raman spectroscopy.
Abstract: In this work, the effect of boron concentration on the critical thickness of heavily boron doped Si1−xGex alloys (Si1−x−yGexBy) has been studied using Raman spectroscopy. The experimental results indicate that while boron decreases the stored strain energy, it can substantially increase the critical thickness for a given Ge concentration. The Si1−x−yGexBy critical thickness was calculated using two different models based on energy balance and kinetic considerations. The results show that the kinetic model provides a good estimate for the Si1−x−yGexBy critical thickness.

Journal ArticleDOI
TL;DR: In this paper, the impact of heavy boron doping and self-aligned germanosilicide formation on local strain in Si1−xGex films has been studied and the critical thickness of Si1 −x−yGexBy has been calculated for the first time based on kinetically limited critical thickness calculations for metastable Si 1 −x Gex films.
Abstract: In recent years, the semiconductor industry has increasingly relied on strain as a performance enhancer for both n and p-MOSFETs. For p-MOSFETs, selectively grown Si1−xGex alloys in recessed source/ drain regions are used to induce uniaxial compressive strain in the channel. In order to induce compressive strain effectively using this technology, a number of parameters including recess depth, Si1−xGex thickness (junction thickness), sidewall thickness, dopant density, dislocation density, and contact materials have to be optimized. In this work, we have studied the effects of heavy boron doping and self-aligned germanosilicide formation on local strain. Raman spectroscopy has been used to study the impact of heavy boron doping on compressive stress in Si1−xGex films. Strain energy calculations have been performed based on Vegard’s law for ternary alloys and the effect of boron on strain in Si1−x−yGexBy alloys modeled quantitatively. It will be shown that, owing to the smaller size of a boron atom, one substitutional boron atom compensates the strain due to 6.9 germanium atoms in the Si1−x−yGexBy film grown pseudomorphically on silicon. The critical thickness of Si1−x−yGexBy has been calculated for the first time based on kinetically limited critical thickness calculations for metastable Si1−xGex films. It will be shown that the critical thickness of the alloy increases as the boron content in the alloy is increased, making boron concentration an additional parameter for optimizing strain in the MOSFET. Based on these conclusions, boron concentration can be used to preserve the strain for thicker Si1−x−yGexBy films (compared to Si1−xGex films) while keeping the dislocation density low. Furthermore, we show that NiSiGe contacts can have a profound impact on the SiGe strain. Our results indicate that NiSiGe introduces additional stress in the underlying Si1−x−yGexBy, which further affects the strain induced in the channel.

Proceedings ArticleDOI
17 Jun 2006
TL;DR: In this article, the role of asymmetric tunneling across oxide barriers in hybrid silicon/molecular devices was discussed, where devices incorporating redoxactive (ferrocene) molecules on silicon dioxide (SiO 2 ) of varying thickness and Hafnium dioxide (HfO 2 /SiO2 stack on p-Si substrates were investigated as charge storage elements.
Abstract: This paper discusses the role of asymmetric tunneling across oxide barriers in Hybrid Silicon/Molecular devices. Devices incorporating redox-active (ferrocene) molecules on silicon dioxide (SiO 2 ) of varying thickness and Hafnium dioxide (HfO 2 )/SiO 2 stack on p-Si substrates were investigated as charge storage elements. The reduction (erase) process was found to be increasingly rate-limited as compared to oxidation (write) process with increasing SiO 2 thickness. This is attributed to asymmetric tunneling rates mainly due to a lower potential drop across the tunnel barrier for a given gate voltage during reduction process as compared to oxidation, resulting from higher surface potential drop in Si. Although increased SiO 2 thickness provides for improved retention, it severely retards write process. This can be overcome by employing asymmetric layered barrier of HfO 2 /SiO 2 which enhances effect of inherent asymmetric tunneling rates and also speeds up the write process due to higher relative permittivity and lower barrier offsets of HfO 2 /SiO 2 on Si as compared to SiO 2 . This behavior can be utilized to improve retention properties of these hybrid memory devices with minimal deterioration in write times.