Showing papers by "Wen-Yan Yin published in 2008"
TL;DR: In this paper, a detailed investigation of MWCNT-based interconnect performance is presented, for the first time, and a compact equivalent circuit model is presented for evaluating and compared with traditional Cu interconnects, as well as Single-Walled CNT (SWCNT) based interconnect, at different interconnect levels.
Abstract: Metallic carbon nanotubes (CNTs) have received much attention for their unique characteristics as a possible alternative to Cu interconnects in future ICs. Until this date, while almost all fabrication efforts have been directed toward multiwalled CNT (MWCNT) interconnects, there is a lack of MWCNT modeling work. This paper presents, for the first time, a detailed investigation of MWCNT-based interconnect performance. A compact equivalent circuit model of MWCNTs is presented for the first time, and the performance of MWCNT interconnects is evaluated and compared against traditional Cu interconnects, as well as Single-Walled CNT (SWCNT)-based interconnects, at different interconnect levels (local, intermediate, and global) for future technology nodes. It is shown that at the intermediate and global levels, MWCNT interconnects can achieve smaller signal delay than that of Cu interconnects, and the improvements become more significant with technology scaling and increasing wire lengths. At 1000- global or 500- intermediate level interconnects, the delay of MWCNT interconnects can reach as low as 15% of Cu interconnect delay. It is also shown that in order for SWCNT bundles to outperform MWCNT interconnects, dense and high metallic-fraction SWCNT bundles are necessary. On the other hand, since MWCNTs are easier to fabricate with less concern about the chirality and density control, they can be attractive for immediate use as horizontal wires in VLSI, including local, intermediate, and global level interconnects.
350 citations
TL;DR: In this paper, a theoretical investigation was carried out for predicting radiation characteristics of single-walled carbon nanotube (SWCNT) bundle dipole antennas based on the distributed circuit parameters and the model of an SWCNT, where the cross section of bundles can be in a circular and a rectangular geometry, respectively.
Abstract: A theoretical investigation is carried out for predicting radiation characteristics of single-walled carbon nanotube (SWCNT) bundle dipole antennas based on the distributed circuit parameters and the model of an SWCNT, where the cross section of bundles can be in a circular and a rectangular geometry, respectively. The current distributions in such novel antennas are predicted to investigate the effects of bundle cross-sectional size, tube diameter, tube length, and operating frequency. Furthermore, comparative studies are performed to show the geometry- and frequency-dependent radiation resistance, far-field pattern, and radiation efficiency of some typical bundle dipole antennas, which are numerically confirmed to outperform an SWCNT antenna by 30-40 dB in radiation efficiency.
107 citations
TL;DR: In this article, a fully scalable and SPICE compatible wideband model of on-chip interconnects valid up to 110 GHz is presented, which consists of an RL ladder network to capture the skin and proximity effects, as well as the substrate skin effect.
Abstract: A fully scalable and SPICE compatible wideband model of on-chip interconnects valid up to 110 GHz is presented in this paper. The series branches of the proposed multisegment model consist of an RL ladder network to capture the skin and proximity effects, as well as the substrate skin effect. Their values are obtained from a technique based on a modified effective loop inductance approach and complex image method. A CG network is used in the shunt branches of the model, which accounts for capacitive coupling through the oxide and substrate loss due to the electrical field, as well as the impact of dummy metal fills. The values of these elements are determined by analytical and semiempirical formulas. The model is validated by a full-wave electromagnetic field solver, as well as measurements. The simulated S-parameters of the model agree well with the measured S-parameters of on-chip interconnects with different widths and lengths over a wide frequency range from dc up to 110 GHz.
38 citations
TL;DR: In this paper, a generalized topological circuit model with mutual capacitive and inductive couplings treated appropriately is presented, and a set of analytical equations is given for calculating all mutual frequency-independent inductances among different spirals.
Abstract: Vertical topologies of on-chip silicon miniature multispiral stacked inductors are addressed, which have been fabricated by a 0.18-mum CMOS process. A generalized topological circuit model is first developed with mutual capacitive and inductive couplings treated appropriately. A set of analytical equations is given for calculating all mutual frequency-independent (dc) inductances among different spirals. The partial-element equivalent-circuit method is implemented for capturing frequency- and temperature-dependent resistances and inductances (ac) of arbitrary spiral-stacked geometries by which mutual inductive coupling between different spirals are investigated. According to the fabricated four- to six-spiral stacked inductors and the measured two-port S parameters, modeling and experimental studies are carried out so as to verify applicability and scalability of the proposed topological model. Excellent agreement between them are achieved in the characterization of inductances and factors of all samples beyond their self-resonant frequencies.
30 citations
TL;DR: In this article, the transient thermal responses of GaAs field-effect transistors (FETs) in the presence of an electromagnetic pulse (EMP) are investigated, and the numerical methodology employed is an efficient nonlinear finite-element method (FEM) that combines the element-by-element FEM and the preconditioned conjugate gradient technique.
Abstract: Transient thermal responses of GaAs field-effect transistors (FETs) in the presence of an electromagnetic pulse (EMP) are investigated in this paper. The numerical methodology employed is an efficient nonlinear finite-element method (FEM) that combines the element-by-element FEM and the preconditioned conjugate gradient technique. Parametric studies are carried out to show different pulse parameters on the transient thermal responses as well as maximum channel temperatures of some typical GaAs FETs, with silicon FETs also taken into account for comparison. It is numerically proven that the thermal impact caused by medium EMP will be the most serious compared with fast EMP or ultra-wideband pulse, and the captured maximum channel temperature is proportional to the input power density, approximately of the EMP injected. This research can serve as a base for taking further protection measures to prevent on-chip device from breakdown by the attack of an EMP.
20 citations
TL;DR: In this paper, a generalized mathematical procedure is developed for investigating shielding performance and inner wideband pulse responses of metallic rectangular multistage cascaded enclosures with multiple rectangular apertures, which is illuminated by an electromagnetic pulse.
Abstract: A generalized mathematical procedure is developed for investigating shielding performance and inner wideband pulse responses of metallic rectangular multistage cascaded enclosures with multiple rectangular apertures, which is illuminated by an electromagnetic pulse (EMP). The mathematical methodology is based on the integral equation technique combined with the method of moments, by which all unknown aperture fields are solved according to a set of linear algebraic equations of infinite order. Numerical computations are performed to show frequency- and geometry-dependent shielding effectiveness and inner pulse waveforms of single- and double-stage cascaded enclosures, respectively, with computational accuracy and convergence rate also checked. It is found that using appropriate metallic multistage cascaded enclosures, high shielding performance can be achieved, which can provide an effective protection for certain electronic and communication systems from the interference of an EMP.
17 citations
TL;DR: In this article, the authors proposed a new differential topology that features a stacked multiloop inductor, which can accurately analyze mutual inductive couplings among different spirals in these multi-oop geometries.
Abstract: This paper proposes a new differential topology that features a stacked multiloop inductor. Comparative studies of stacked one- to four-loop spiral inductors with and without patterned ground shields (PGSs) for silicon-based radio-frequency integrated circuits (RFICs) were conducted, and lumped-element circuit models were developed for these inductors. The partial-element equivalent-circuit method that can accurately analyze mutual inductive couplings among different spirals in these multiloop geometries was employed for capturing the frequency-dependent inductances and resistances of inductors at low frequencies. A good agreement between numerical results and measurements is obtained. It is demonstrated that a stacked multiloop spiral inductor with differential topology and PGS has a larger inductance and a higher Q-factor as compared with the same inductor without differential topology and PGS. This hybrid methodology could provide a promising technique for developing new silicon-based passive devices used in RFICs.
16 citations
TL;DR: In this article, a physically meaningful circuit model for integrated RF lossy passives such as spiral inductors on a silicon substrate is presented, which can be very concise while preserving the major physical meanings and attributes of the original circuit layout.
Abstract: This paper presents a novel approach for deriving a physically meaningful circuit model for integrated RF lossy passives such as spiral inductors on a silicon substrate. The approach starts from a quasi-static partial element equivalent circuit (PEEC) model. The concept of complex inductance and capacitance is introduced to uniformly deal with the conductor and dielectric losses. Basic Y- Delta network transformation is used to ldquoabsorbrdquo the insignificant internal nodes of the original PEEC network and to reduce the order of the circuit model. The physically expressive circuit model given here can be very concise while preserving the major physical meanings and attributes of the original circuit layout. A low-temperature co-fired ceramic bandpass filter and two practical inductors fabricated using a 0.18-mum CMOS process are studied by the model to demonstrate the validity of this new approach. Furthermore, the stability condition of the model is also discussed.
14 citations
15 Jun 2008
TL;DR: In this article, an unconditionally stable three-dimensional (3-D) finite-difference time-method (FDTD) based on the locally one-dimension (LOD) scheme was proposed.
Abstract: This paper presents an unconditionally stable three-dimensional (3-D) finite-difference time-method (FDTD) based on the locally one-dimension (LOD-FDTD) scheme. The unconditional stability is proven theoretically and validated numerically. Numerical dispersion of the method is also derived analytically. Through the dispersion analysis and a numerical example, the proposed LOD-FDTD method is found to use less memory and CPU time than the conventional unconditionally stable alternating-direction-implicit (ADI) FDTD and other LOD-FDTD methods but with the same level of numerical accuracy. The saving in CPU time can be more than 55% in comparisons with the ADI-FDTD method and more than 29% in comparisons with a previously reported LOD-FDTD method.
12 citations
21 Apr 2008
TL;DR: In this paper, an accurate procedure is proposed to characterize distributed parameters of silicon-based patterned shield and patterned ground shield coplanar waveguides (PS-and PGS-CPWs), where skin and proximity effects are treated appropriately.
Abstract: An accurate procedure is proposed to characterize distributed parameters of silicon-based patterned shield and patterned ground shield coplanar waveguides (PS-and PGS-CPWs), where skin and proximity effects are treated appropriately. These interconnects can include symmetrical, asymmetrical, non-uniform, and even differential transmission lines. Numerical investigations are carried out to show the influence of various geometrical and physical parameters on the frequency-dependent distributed parameters, which is important in the design of silicon-based microwave and millimeter wave integrated circuits.
11 citations
30 Dec 2008
TL;DR: In this paper, the authors investigate electro-thermal properties of metallic single-walled carbon nanotube (SWCNT) interconnect arrays biased by a signal voltage, where temperature distribution, breakdown voltage, and current carrying capability are captured by solving one-dimensional heat conduction equation of the SWCNT.
Abstract: We investigate electro-thermal properties of metallic single-walled carbon nanotube (SWCNT) interconnect arrays biased by a signal voltage in this paper, where temperature distribution, breakdown voltage, and current carrying capability are captured by solving one-dimensional heat conduction equation of the SWCNT. Two electro-thermal equivalent circuit models of single SWCNT and a SWCNT array are proposed to illustrate hybrid effects of SWCNT length, biasing voltage, and temperature on their signal integrities. Simulation results indicate that self-heating effect should be considered carefully in the design of local SWCNT array interconnect as it is biased by a high signal voltage.
01 Dec 2008
TL;DR: In this paper, the authors proposed two modified temperature-dependent equivalent circuit models for single and double-walled carbon nanotube (SWCNT & DWCNT) interconnects.
Abstract: In this paper, the authors propose two modified temperature-dependent equivalent circuit models for single- and double-walled carbon nanotube (SWCNT & DWCNT) interconnects at first, and the temperature effect on crosstalk in SWCNT and DWCNT interconnects are investigated, respectively. The crosstalk-induced delay and noise of these novel interconnects are characterized numerically over a temperature range from 300 to 600K. The simulation results show that the crosstalk-induced delay increases significantly and the noise increases slightly while the temperature is raised, which indicate that the performance and reliability degrade with an increase in CNT interconnects temperature.
TL;DR: In this article, the performance of on-chip circular silicon transformers has been evaluated using measured two-port S-parameters, a de-embedding procedure, and simulated Sparameters derived from a lumped-element circuit model.
Abstract: We have characterized performance of on-chip circular silicon transformers. The circular transformers were fabricated by the standard 0.18 mum CMOS process. We used measured two-port S-parameters, a de-embedding procedure, and simulated S-parameters derived from a lumped-element circuit model. We examined performance indicators of transformers such as quality factor (Q), maximum available gain (G max), coupling coefficient (kappa), and minimum noise figure (NF min) for various cases. We characterized all the parasitic capacitive and inductive effects. The results obtained are useful in the global optimization of high-performance transformers used in the design of certain radio-frequency integrated circuits.
TL;DR: In this paper, a ladder reflector antenna on chip has been developed using the standard 0.18-um six metal layers complementary metaloxide-semiconductor (CMOS) process.
Abstract: A new compact 24-GHz ladder reflector antenna on chip has been developed using the standard 0.18-um six metal layers complementary metal-oxide-semiconductor (CMOS) process. The antenna consists of an active dipole and a ladder reflector array. The ladder reflector array successfully adjusts the radiation direction of the active dipole and effectively suppresses the active dipole interference to chip circuit. The measured results show that the ladder reflector antenna has a 6.25-dBdc gain at 24 GHz and a -6-dB S11 impedance bandwidth of 19.92 27.60 GHz . The design method presented in this letter is quite straightforward, and can be used to develop antenna on chip for the wireless interconnect for interchip communications.
TL;DR: In this article, an analytical dynamic power model of CMOS gates driving transmission lines with distributed RLC parameters is presented, where the dynamic power consumption is approximated by the summation of the first several Fourier-series-based terms.
Abstract: This paper presents an analytical dynamic power model of CMOS gates driving transmission lines with distributed RLC parameters. It is shown that at high signal frequency, where the output voltage at the termination of a transmission line may not reach the steady state during a signal period, the charge and voltage at the end of the period become the initial conditions of the following periods and have a significant effect on dynamic power consumption. The proposed model takes these initial conditions into account, since it is based on Fourier series analysis. In this model, the dynamic power consumption is approximated by the summation of the first several Fourier-series-based terms. The accuracy of the model increases with the number of series terms, and arbitrary accuracy can be obtained by including appropriate number of the terms in the model. The model is much faster than simulation program with integrated circuit emphasis (SPICE), and its computational complexity is linear with the number of terms included. The model is also extended to CMOS gates driving distributed RLC trees and coupled multiconductor transmission lines.
01 Dec 2008
TL;DR: In this article, two novel multi-layered cross-coupled SIW circular cavity filters with different coupling structures are proposed and their different spurious responses are examined and compared numerically.
Abstract: Two novel multi-layered cross-coupled SIW circular cavity filters with different coupling structures are proposed in this paper. Their different spurious responses are examined and compared numerically. The filter samples are designed using standard LTCC technology and measurement results will be reported soon.
19 May 2008
TL;DR: In this article, a modified conformal technique for fourth-order finite-difference time domain (FDTD (2, 4)) is proposed, which can achieve higher accuracy and low dispersion errors.
Abstract: A modified conformal technique for fourth-order finite-difference time-domain (FDTD (2, 4)) is proposed. This conformal scheme has higher-order accuracy than that of conventional FDTD and FDTD (2, 4) methods, which are caused by staircasing errors when modeling curved metallic objects. Two integration loops of Faradaypsilas law for the updating of magnetic field components are introduced here. Numerical examples show that the proposed scheme can achieves higher accuracy and low dispersion errors, compared with the low-order conformal method and the conventional staircased FDTD method.
21 Apr 2008
TL;DR: In this article, a procedure for designing T-septum substrate integrated waveguide (TSSIW) with an ultra-wideband monomode theoretically, and its characteristics is further examined numerically.
Abstract: It is known that T-septum waveguide is better than the conventional ridged waveguide with respect to its cutoff frequency and bandwidth of the monomode guided. An improved structure called T-septum substrate integrated waveguide (TSSIW) has been proposed for integrating with planar microwave circuits more recently. Therefore, we propose a procedure for designing TSSIW with an ultra-wideband monomode theoretically, and its characteristics is further examined numerically.
21 Apr 2008
TL;DR: In this paper, the transient thermal characteristics of GaAs field effect transistors (FETs) in the presence of high power electromagnetic pulses (HP-EMP) are investigated by hybrid finite element methods combining element-by-element finite element method (EBE-FEM) with the preconditioned conjugate gradient (PCG) technique.
Abstract: In this paper, the transient thermal characteristics of GaAs field-effect transistors (FETs) in the presence of high- power electromagnetic pulses (HP-EMP) are investigated. By hybrid finite element methods which combining element-by- element finite element method (EBE-FEM) with the preconditioned conjugate gradient (PCG) technique, transient thermal responses including the maximum channel temperature of GaAs FETs and the maximum input power density of the thermal sources are extracted which will be useful for further taking thermal protection so as to prevent on-chip device breakdown from the attack of a HP-EMP.
01 Dec 2008
TL;DR: In this paper, transient electrothermal analysis of the LDMOS under an EMP was performed using self-developed hybrid time-domain FEM, where the maximum temperature in the lDMOS was obtained as the injected voltage pulse fluctuates.
Abstract: In this paper, transient electro-thermal analysis of the LDMOS under an EMP is performed using self-developed hybrid time-domain FEM. The maximum temperature in the LDMOS is obtained as the injected voltage pulse fluctuates. Temperature distribution in the LDMOS at every time point is also captured.
21 Apr 2008
TL;DR: In this article, the authors examined transient responses of power dividers illuminated by a high-power electromagnetic pulse (EMP) and performed numerical calculation to show the EMP impact on the input-output responses of some power dividers which are often used in the integration of monolithic microwave integrated circuits.
Abstract: It is well known that intentional or unintentional electromagnetic interference can cause improper functionality of microwave circuits or systems, and in this paper, we examine transient responses of power dividers illuminated by a high-power EMP. The mathematical treatment is based on modified FDTD method. Numerical calculation is performed to show the EMP impact on the input-output responses of some power dividers which are often used in the integration of monolithic microwave integrated circuits.
01 Dec 2008
TL;DR: In this article, a low-phase noise dielectric resonator with enclosure using a puck is investigated. Butler et al. achieved very low phase noise with a performance of -125dBc/Hz at 10kHz offset.
Abstract: High performance low phase noise dielectric resonators oscillators are demonstrated incorporating a cascaded SiGe amplifier, a resonator, and a phase shifter. A resonator with enclosure using a dielectric puck is investigated. Very low phase noise is achieved with a performance of -125dBc/Hz at 10kHz offset. This is typically 15-20dB better than most commercial designs.
15 Jul 2008
TL;DR: In this article, a derived circuit model for integrated passives in RFICs is presented, which represents clear physical meaning and can be easily plugged into the RFIC design flow.
Abstract: A systematic derived circuit model for integrated passives in RFICs is presented in this paper. This generic concise circuit model represents clear physical meaning and can be easily plugged into the RFIC design flow. As demonstration examples, the physically meaningful circuit models of a section of coplanar waveguide (CPW) and a square spiral inductor fabricated using 0.18 mum CMOS process are derived. Excellent agreement of the Q performances and the frequency responses of the derived circuit model with those from the measurements can be observed over the frequency range from 0.45 GHz to 10 GHz, demonstrating the validity and the usefulness of this new circuit model extraction approach.
TL;DR: In this article, two new on-chip dipoles in standard 0.18-μm CMOS are presented, which show higher inter-chip transmission gain than traditional onchip meander dipole and smaller coverage than traditional ON-chip linear dipole.
Abstract: Two new on-chip dipoles in standard 0.18-μm CMOS are presented. The dipoles show higher inter-chip transmission gain than traditional on-chip meander dipole and smaller coverage than traditional on-chip linear dipole. Comparison between the simulated and measured S11 of the on-chip dipoles indicates that the existence of metal, poly and diffusion dummies decrease the resonances. Transmission gains with different inter-chip distances and under different experiment conditions are calculated from measured S parameters, respectively. The design is helpful for the performance improvement of on-chip dipoles and the farther CMOS integration of on-chip antennas for wireless interconnect applications. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 2446–2449, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23686
19 May 2008
TL;DR: In this paper, the authors investigated the transient current responses of some fractal antennas excited by an EMP source and demonstrated that the resonant behavior is dominated by the overall pattern, physical size, and total wire length of the fractal antenna.
Abstract: This paper investigates transient current responses of some fractal antennas excited by an EMP source. The phenomenon that fractal antennas are resonant at lower frequencies than their same-sized Euclidean counterparts can be also observed in our analysis in time domain. In order to model complex and multi-dimensional geometry of fractal curves, we employ linear vector basis defined on cylindrical surface. At the same time, Laguerre polynomials as entire domain temporal basis are used to expand the time variables related Numerical examples for some typical fractal antennas demonstrate that the resonant behavior is dominated by the overall pattern, physical size, and total wire length of the fractal antenna.
01 Dec 2008
TL;DR: In this article, a miniaturized dual-mode ring bandpass filter is realized and studied, which can provide two orthogonal zeroth-order resonance modes, and its occupied area can be reduced by about 82% compared with the conventional one.
Abstract: In this paper, a novel miniaturized dual-mode ring bandpass filter is realized and studied. By using only one resonant-type left-handed unit with complementary split ring resonator to combine with a microstrip line, the ring configuration can provide two orthogonal zeroth-order resonance modes, and its occupied area can be reduced by about 82% compared with the conventional one. The filter has the first spurious response 2.58 times away from the central frequency, so its spurious suppression characteristics is also improved. The filter performance is demonstrated by our measured S-parameters, with good agreement obtained as compared with the simulated ones.
19 May 2008
TL;DR: In this paper, an improved eigenmode expansion method (EEM) is proposed for analyzing power/ground plane pairs in high-speed printed circuit boards (PCB), which is only applicable for regular structures in a PCB, such as rectangular and circular geometries, and it costs much computational time.
Abstract: An improved eigenmode expansion method (EEM) is proposed for analyzing power/ground plane pairs in high-speed printed circuit boards (PCB). We notice that the EEM is only applicable for regular structures in a PCB, such as rectangular and circular geometries, and it costs much computational time. Therefore, asymptotic waveform evaluation (AWE) technique and inverted composition method are combined with the EEM for capturing frequency-dependent transfer and self impedances of the power/ground plane with single or even many holes. The simulation results show that good agreements are achieved between our results and those obtained by finite-element method (FEM).
30 Dec 2008
TL;DR: In this article, the authors used hybrid nonlinear time-domain finite element method (FEM) and pre-conditioned conjugated gradient technique (PCG) combined with the element-by-element FEM to enhance numerical analysis, where the temperature dispersion effects of electrical conductivities, thermal conductivity, coefficient of thermal expansion, and Young?s modulus of the materials involved are all taken into account.
Abstract: Electro-thermo-mechanical transient investigation on multi-layer high-density interconnects in the presence of an ESD pulse is carried out using hybrid nonlinear time-domain finite element method (FEM). The pre-conditioned conjugated gradient technique (PCG) is combined with the element-by-element FEM so as to enhance our numerical analysis, where the temperature dispersion effects of electrical conductivity, thermal conductivity, coefficient of thermal expansion, and Young?s modulus of the materials involved are all taken into account. Parasitic studies are performed to show time-dependent von Mises stress responses of some typical interconnects as the injection of an ESD current pulse, which can be fabricated using advanced semiconductor technologies, such as 90-, 60, and even 45-nm CMOS, etc.
01 Dec 2008
TL;DR: In this article, the authors proposed a new high-order conformal method, in which they use two integral loops of Faraday's law to update H-field and observed that the proposed method has low numerical dispersion error, and can use large space cells so as to reduce the computer memory required.
Abstract: In this paper, we have proposed a new high-order conformal method, in which we use two integral loops of Faraday's law to update H-field. We observe that the proposed method has low numerical dispersion error, and it can use large space cells so as to reduce the computer memory required. Using this modified method, numerical computations are performed to predict the RCS of a PEC object as well as the shielding effectiveness of a metallic enclosure, with good agreements achieved but with less computer memory required.
TL;DR: In this paper, two on-chip slot antennas resonating near 30 GHz with different widths (10 and 100 μm) in standard 0.18 μm CMOS are presented.
Abstract: Two on-chip slot antennas resonating near 30 GHz with different widths (10 and 100 μm) in standard 0.18 μm CMOS are presented. S21 between two 10 μm width slot antennas and between two 100 μm width ones both with ∼3 mm distance through free space is measured. The results indicate that designing on-chip slot antennas with standard CMOS process is feasible, which will support farther improvement of CMOS integration. The slot antennas can be used in compact and low cost transceivers for short range wireless communications. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 1187–1191, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23325