scispace - formally typeset
Search or ask a question

Showing papers by "Hewlett-Packard published in 1981"


Book
01 Jun 1981
TL;DR: This document serves both as an introduction to CLU and as a language reference manual that describes each aspect of CLU in detail, and discusses the proper use of various features.
Abstract: This document serves both as an introduction to CLU and as a language reference manual. Sections 1 through 4 present an overview of the language. These sections highlight the essential features of CLU, and discuss how CLU differs from other, more conventional, languages. Sections 5 though 13 form the reference manual proper. These sections describe each aspect of CLU in detail, and discuss the proper use of various features. Appendices 1 though III provide concise summaries of CLU''s syntax, data types, and I/O facilities. Appendix IV contains example programs.

353 citations


Journal ArticleDOI
N.S. Chang1, K.S. Fu
TL;DR: Integrated pictorial data-base systems need pictorial query languages to enhance their effectiveness and the tabular structures of QPE, IQ, and others are easy to understand and access.
Abstract: Integrated pictorial data-base systems need pictorial query languages to enhance their effectiveness. The tabular structures of QPE, IQ, and others are easy to understand and access.

119 citations


Journal ArticleDOI
TL;DR: In this article, a new technique for CMOS p-well (or n-well) formation is described, making use of a deep implant followed by a brief anneal, permitting a much shallower well, a large reduction in p-n channel device spacing, and an opportunity to reduce the risk of latch-up.
Abstract: A new technique for CMOS p-well (or n-well) formation is described, making use of a deep implant followed by a brief anneal. This results in a retrograde profile, permitting a much shallower well, a large reduction in p-n channel device spacing (5-6 µm versus 10-15 µm), and an opportunity to reduce the risk of latch-up. This technique is more conducive to scaling-with the promise of significantly better performance-than conventional well formation methods. The retrograde p-well has been successfully applied to a linearly shrunk bulk CMOS 4K static RAM, demonstrating its feasibility.

104 citations


Patent
30 Mar 1981
TL;DR: In this paper, an improved photoetch technique is presented of the multilayer resist type wherein a thin top layer of resist and a thick planarizing layer are deposited on a substrate and the thin layer is exposed and developed to produce a patterned resist layer.
Abstract: An improved photoetch technique is presented of the multilayer resist type wherein a thin top layer of resist and a thick planarizing layer are deposited on a substrate and the thin layer is exposed and developed to produce a patterned resist layer. The improvement involves dissolving a suitable dye in a layer between the thin top layer and the substrate. The dye is preferably selected to absorb light of the wavelengths used to expose the top layer but does not interfere with processing of the other layers.

74 citations


Patent
30 Mar 1981
TL;DR: In this paper, an improved photoetch technique is presented of the portable conformable mask type wherein a thin top layer of resist and a thick planarizing layer are deposited on a substrate and the thin layer is exposed and developed to produce a portable-conformable mask.
Abstract: An improved photoetch technique is presented of the portable-conformable-mask type wherein a thin top layer of resist and a thick planarizing layer are deposited on a substrate and the thin layer is exposed and developed to produce a portable-conformable-mask. The improvement involves dissolving a suitable dye in a layer between the thin top layer and the substrate. The dye is preferably selected to absorb light of the wavelengths used to expose the top layer but does not interfere with processing of the other layers.

67 citations


Patent
Eric G. Hanson1
03 Sep 1981
TL;DR: In this article, an optical switch having low insertion loss and low crosstalk is provided by two slabs of birefringent material having a polarization rotator as a control element interposed therebetween.
Abstract: An optical switch having low insertion loss and low crosstalk is provided by two slabs of birefringent material having a polarization rotator as a control element interposed therebetween. By controlling the polarization rotator electrically, a selectable ratio of transmitted-to-displaced output optical power is realized. The optical switch therefore can function as an attenuator to a light beam traversing through it. In the preferred embodiment calcite crystals are used for the slabs, and a liquid crystal cell for the polarization rotator.

65 citations


Journal ArticleDOI
TL;DR: In this article, a new equation which describes the interdependence of instrument band spreading, injection volume and input profile is proposed and experimentally verified in two modes: 1. without a column; 2. with a column.
Abstract: A new equation which describes the interdependence of instrument band spreading, injection volume and input profile is proposed and experimentally verified in two modes: 1. without a column; 2. with a column. It is shown that under equivalent conditions both modes are in excellent agreement. The method of calculation of the variance of a response function appeared to be of utmost importance in correctly interpreting the experimentally observed interdependence of instrumental band spreading and injection characteristics.

64 citations


Proceedings ArticleDOI
John Hiatt1
07 Apr 1981
TL;DR: In this paper, a failure analysis technique using cholesteric liquid crystals and polarized light is presented to locate areas of high power dissipation on an integrated circuit, which can be performed in a few minutes using common failure analysis equipment.
Abstract: This paper presents a failure analysis technique which uses cholesteric liquid crystals and polarized light to locate areas of high power dissipation on an integrated circuit. The technique is non-destructive and can be performed in a few minutes using common failure analysis equipment. An example is given involving the analysis of a CMOS latch-up mechanism.

61 citations


Journal ArticleDOI
TL;DR: In this paper, the performance of GaAs dc-coupled amplifiers with bandwidths up to 5 GHz is described. And the multistage amplifiers include designs having 25-dB gain with 2 GHz bandwidth and 10-dB gains with 5 GHz bandwidth.
Abstract: Monolithic GaAs dc-coupled amplifiers with bandwidths up to 5 GHz are described. The multistage amplifiers include designs having 25-dB gain with 2-GHz bandwidth and 10-dB gain with 5-GHz bandwidth. Analysis of gain, bandwidth, and noise agrees with measurements. Distortion mechanisms are discussed, along with the performance of a low-distortion amplifier.

60 citations


Journal ArticleDOI
TL;DR: In this article, a new phenomenological model for the electrical conduction in polycrystalline silicon was developed, which is based on the properties of the grain boundaries and was compared to experiment.
Abstract: In the preceding paper [1], a new phenomenological model for the electrical conduction in polycrystalline silicon was developed. Electrical conduction in polycrystalline silicon was shown to be controlled by dopant segregation, carrier trapping, and carrier tunneling through the grain boundaries. In this paper, the theoretical model is compared to experiment. The electrical behavior of polycrystalline silicon is shown to be influenced by the properties of the grain boundaries. In arsenic and phosphorus-doped polycrystalline-silicon films the grain boundaries are best modeled by rectangular barriers with a height of 0.66 eV and an approximate width of 7 A. The width of the grain-boundary barriers and the density of carrier trapping states are found to be weak functions of the dopant species and sample processing. The resistivity is found to be a strong function of dopant concentration, dopant species, and processing history at low and intermediate dopant concentrations, and the model can be used to predict this behavior.

56 citations


Patent
Leonard Mark1
10 Aug 1981
TL;DR: In this article, a method to obtain a sharp index pulse with minium side lobes for an optical shaft encoder is presented. But the method is not suitable for the case where the transmissive sections of the encoder wheel and phase plate are non-uniformly aligned.
Abstract: An apparatus and method are provided to obtain a sharp index pulse with minium side lobes for an optical shaft encoder. By nonuniformly aligned multiple transmissive sections in the encoder wheel and phase plate of the shaft encoder, the transmissive sections become nonprogressively coincident in the light modulation process to provide the desired index pulse. In another preferred embodiment, secondary tracks having nonuniformly positioned multiple transmissive sections provide a parallel modulated light to enhance the index pulse and further reduce side lobes.

Journal ArticleDOI
TL;DR: A simple, rapid method for the determination of the benzodiazepines, diazepam and chlordiazepoxide, and their metabolites by high performance liquid chromatography (HPLC) has been developed and is applicable to the assay of other similar drugs in biological fluids.
Abstract: A simple, rapid method for the determination of the benzodiazepines, diazepam and chlordiazepoxide, and their metabolites by high performance liquid chromatography (HPLC) has been developed. The procedure is applicable to the assay of other similar drugs in biological fluids. The method utilizes BondElut extraction columns to facilitate the extraction. BondElut columns selectively adsorb the benzodiazepines and metabolites from serum at a pH of 9.0. The compounds are eluted with 300 microliters of methanol which makes sample concentration rapid, if even necessary. Analysis is performed using isocratic reversed-phase chromatography, and quantitation is carried out by ultraviolet (UV) detection. Using this procedure, it is possible to determine drug and metabolite levels to as low as 25 ng/ml in 0.5 ml of serum.

Journal ArticleDOI
TL;DR: In this paper, the optimum conditions for the growth of high-quality AlxGa1_xAs by means of vapor phase epitaxy from organometallic compounds (OMVPE) are reported, and typical values of mobili-ty and radiative recombination efficiency are reported.
Abstract: Optimum conditions are reported for the growth of high-quality AlxGa1_xAs by means of vapor phase epitaxy from organometallic compounds (OMVPE). Typical values of mobili-ty and radiative recombination efficiency are reported, showing that OMVPE material quality is the same as that grown by liquid phase epitaxy (LPE). OMVPE-grown DH narrow-stripe lasers with Al.06Ga.94As active layers show minimum threshold currents of85 mA, comparable to the best lasers with similar structures produced by LPE.

Journal ArticleDOI
K.-P. Hupe1, H.H. Lauer1
TL;DR: In this paper, the influence of the pressure limitation and pumping capacity of a chromatographic system on the production rate is discussed, and it is shown that working under conditions where the contribution to mass dispersion of the injected volume and the column itself are about equal is to be preferred is preferable.

Patent
Helge Schrenker1
08 Oct 1981
TL;DR: In this paper, a high pressure metering pump has a duty cycle consisting of an aspiration portion where liquid is aspirated into a pumping chamber, a compression portion where the aspirated liquid is compressed to feed pressure, a feed portion where a part of the compressed liquid is expelled out of the pumping chamber and a decompression part where the liquid remaining in the tank is expanded to aspiration pressure.
Abstract: A high pressure metering pump has a duty cycle consisting of an aspiration portion where liquid is aspirated into a pumping chamber, a compression portion where the aspirated liquid is compressed to feed pressure, a feed portion where a part of the compressed liquid is expelled out of the pumping chamber, and a decompression portion where the liquid remaining in the pumping chamber is expanded to aspiration pressure. A measurement and control apparatus for the pump comprises a controller for adjusting and keeping constant the mean flow rate of the pumped liquid on the aspiration side or on the high pressure side of the pump. The apparatus further comprises a detector for detecting the transition point between the compression and feed portions and/or between the decompression and aspiration portions. The detector derives a control signal for the pump speed and for the optimal opening instant of an externally actuated input valve of the pump from the phase relationships of said transitions.

Journal ArticleDOI
TL;DR: The temperature of the droplets produced at the tip of the direct liquid inlet liquid chromatography/mass spectrometry (DLI LC/MS) probe decreases to about -70 degrees during the adiabatic evaporation of thedroplet in the vacuum of the mass spectrometer.
Abstract: The temperature of the droplets produced at the tip of the direct liquid inlet liquid chromatography/mass spectrometry (DLI LC/MS) probe decreases to about -70 degrees during the adiabatic evaporation of the droplet in the vacuum of the mass spectrometer. Broadening of peaks eluting from the probe is acceptable, being about 80 microL in volume, as shown by the DLI LC/MS analysis of cortisone, dexamethasone, and corticosterone in both the positive and the negative chemical ionization (PCI and NCI) modes. The minimum amount of sample which can be injected is about 10 ng in the scanning mode and about 100 pg in the selected ion monitoring (SIM) mode as shown by the analysis of bromocriptine and bromocriptinine. Other thermally-labile and/or non-volatile compounds analyzed by this system in the PCI and/or the NCI modes included ergotamine, esculin, sulfamethazine, chloramphenicol, erythromycin, alpha-tocopherol, cocaine, 8-chloro-theophylline, and dicophol. Non-ultraviolet absorbing carbohydrates were also analyzed, including sucrose (NCI), permethylated maltotriose, and partially hydrolyzed, derivitized lichenan and starch. By a flow switching technique, bromocriptine in a Pariodel tablet, ergot alkaloids in a Hydergine drop solution, and bromocriptine and bromocriptinine in whole urine could be analyzed without prior extraction.

Journal ArticleDOI
TL;DR: The structure of the polysilicon is similar to the large-grain structure formed by cw laser recrystallization, and no significant differences were seen between the characteristics of transistors in material recrystized by two different types of heating as mentioned in this paper.
Abstract: MOSFET's have been fabricated in polysilicon films recrystallized by scanned, cw electron-beam heating. The structure of the polysilicon is similar to the large-grain structure formed by cw laser recrystallization, and no significant differences were seen between the characteristics of transistors in material recrystallized by the two different types of heating.

Patent
09 Nov 1981
TL;DR: An asynchronous interface enables the transfer of information between a set of devices operating in a loop and having a wide range of operating speeds as discussed by the authors, where each device can enter a Controller active state in which it sources command frames to control the loop operation.
Abstract: An asynchronous interface enables the transfer of information between a set of devices operating in a loop and having a wide range of operating speeds. Each device can enter a Controller active state in which it sources command frames to control the loop operation. Each device can also enter a Talker active state in which it sources Data frames on a Listener active state in which it received Data frames. The transfer of frames is coordinated by a set of handshakes which enable the frames to be transferred in an asynchronous manner.

PatentDOI
TL;DR: In this paper, a novel signal synthesizer provides high frequency synthesized waveforms for the user by converting phase information into digital outputs in parallel and selectively coupling these digital outputs, an ordered digital output is formed to provide the high frequency waveforms.
Abstract: A novel signal synthesizer provides high frequency synthesized waveforms for the user. By converting phase information into digital outputs in parallel and by selectively coupling these digital outputs, an ordered digital output is formed to provide the high frequency waveforms. This ordered digital output, which represents points on a sine function, is converted to an analog signal for the synthesizer output. Furthermore, frequency and phase modulations of the synthesized waveforms are easily implemented with this novel signal synthesizer; the modulation information is simply added to the digital outputs prior to selectively coupling. Thus when the ordered digital output is converted to an analog signal, the analog signal contains the modulation information.

Journal ArticleDOI
TL;DR: In this article, the silicon-sapphire interface of CVD silicon on a (1102) sapphire substrate has been studied by high-resolution transmission electron microscopy.
Abstract: The silicon‐sapphire interface of CVD silicon on a (1102) sapphire substrate has been studied by high‐resolution transmission electron microscopy. Cross‐section images of the interface are presented where the silicon and sapphire lattices are directly resolved. The images show that the interface is planar and abrupt to the limit of resolution (less than 3 A). Defect anisotropy is evident and can be linked to tilt of the [100] direction of the silicon layer with respect to the normal to the substrate.

Journal ArticleDOI
TL;DR: The electrical properties of In 1-x Ga x As y P 1-y alloys matched to InP, grown by liquid-phase and vapor-phase epitaxial techniques, have been determined by various measurements as discussed by the authors.
Abstract: The electrical properties of In 1-x Ga x As y P 1-y alloys lattice matched to InP, grown by liquid-phase and vapor-phase epitaxial techniques, have been determined by various measurements Several electron and hole traps, with activation energies varying from 026 to 082 eV, have been identified by transient capacitance and photocapacitance measurements and their density and capture cross section have been measured The 082 electron trap has emission and capture properties identical to the dominant 083 eV electron trap present in bulk and VPE GaAs Hall measurements were made on the alloys in the temperature range of 20-600 K Analysis of the mobility data has yielded the values of several transport parameters including the alloy scattering potential \Delta U as a function of composition The maximum value of \Delta U \simeq 08 eV corresponding to the bandgap E_{g} \simeq 095 eV Photo-Hall measurements at low temperatures show the presence of donor- and acceptor-like defects in the LPE and VPE alloys, respectively These centers exhibit persistent photoconductivity at low temperatures and have a high barrier energy (∼02 eV) associated with electron capture Defects, which are possibly located in the interconduction-valley region, have been identified from analysis of Hall data for T > 400 K The strong temperature dependence of the threshold current in injection lasers and the large leakage currents near breakdown in avalanche photodiodes have been discussed in the fight of the defects identified in the present investigation

Patent
Zdenek E. Skokan1
22 Jun 1981
TL;DR: The symmetrical logic array as mentioned in this paper provides a simple one-to-one representation of most logic designs to form a universal logic design board in the form of a random logic or programmable state machine.
Abstract: A programmable logic array is provided by symmetrically arraying drivers around the periphery of a substrate. These drivers are essentially OR/NOR gates having latched complementary outputs. The latched complementary outputs enable these logic gates to be implemented into flip-flop elements, and the complementary outputs allow these logic gates to be implemented into AND logic gates. Selectable feedback paths are also provided to add greater flexibility to the programmable logic array. Altogether, the symmetrical logic array provides a simple one-to-one representation of most logic designs to form a universal logic design board in the form of a random logic or programmable state machine.

Journal ArticleDOI
Jun-Wei Chen1, R.J. Ko, D.W. Brzezinski, L. Forbes, C.J. Dell'oca 
TL;DR: In this article, a new deep-level transient spectroscopy (DLTS) technique has been developed for the characterization of deeplevel imperfection centers in silicon-on-sapphire (SOS) epitaxial layers, and is based on the use of conductance transients on MOSFET's.
Abstract: A new deep-level transient spectroscopy (DLTS) technique has been developed for the characterization of deep-level imperfection centers in silicon-on-sapphire (SOS) epitaxial layers, and is based on the use of conductance transients on MOSFET's. Both the distribution of trap levels with energy in the bandgap of silicon and the spatial distribution of levels in the epitaxial film have been obtained. This complete characterization of trapping levels allows process techniques to be developed to control and reduce their concentrations to acceptable levels in SOS technology.


Journal ArticleDOI
J. C. Eidson1
TL;DR: In this paper, an electron-beam lithography system developed at Hewlett-Packard that is potentially many times faster than previous machines for making ICs through direct writing on wafers or generating high-precision masks was presented.
Abstract: Electron-beam lithography may become competitive with optical methods for making integrated circuits. The step that could make this possible is an electron-beam lithography system developed at Hewlett-Packard that is potentially many times faster than previous machines for making ICs through direct writing on wafers or generating high-precision masks. The Hewlett-Packard system has a beam spot-corresponding to the smallest pixel that can be written-with a diameter that can be varied from 0.5 to 0.25 μm.

Journal ArticleDOI
J.M. Mikkelson1, L.A. Hall, A.K. Malhotra, S.D. Seccombe, M.S. Wilson 
01 Oct 1981
TL;DR: An overview of a silicon-gate NMOS fabrication process used to realize a 450000 transistor, 32-bit single-chip CPU that operates at a worst case 18 MHz clock frequency is given in this paper.
Abstract: An overview is given of a silicon-gate NMOS fabrication process used to realize a 450000 transistor, 32-bit single-chip CPU that operates at a worst case 18 MHz clock frequency The technology utilizes 15-/spl mu/m lines and 10-/spl mu/m spaces on all critical levels, and provides tungsten dual layer metallization The device and interconnect structure for this 8-mask process is outlined as a sequence through the process flow Linewidth and alignment statistics are given for the optical reduction-projection step-and-repeat lithography used in this technology

Patent
David G. Miller1
12 Nov 1981
TL;DR: An acoustic transducer has a crystal stack or crystal stacks forming shelves, and leads adhered to a flexible sheet having an opening that fits over the part of the stack that extends above the shelves so as to permit the leads to be aligned with and make electrical contact with the respective crystals.
Abstract: An acoustic transducer having a crystal stack or crystal stacks forming shelves, and leads adhered to a flexible sheet having an opening that fits over the part of the stack that extends above the shelves so as to permit the leads to be aligned with and make electrical contact with the respective crystals.

Patent
28 Sep 1981
TL;DR: In this article, a real-time fault-tolerant hardware error correction device is proposed, which is typically implemented as a data transfer circuit between a disc memory and a processing unit.
Abstract: The present invention provides a real-time fault-tolerant hardware error correction device which is typically implemented as a data transfer circuit between a disc memory and a processing unit. It operates in two modes: as an encoding system and error detector on a disc write, and as a decoding system and error corrector on a disc read. In its first mode, each block of data from the processing unit is encoded with an error syndrome as it is transmitted to the disc memory. Two identical linear feedback shift registers (LFSR's) are used for error detection purposes. In its second mode, the same two LFSR's are implemented with a buffer memory to achieve real-time error correction. Data flow to the LFSR's from the disc memory is alternated block-by-block, one block being received by one LFSR and the succeeding block being received by the other LFSR. At the same time that data is channeled to a particular LFSR, it is channeled synchronously to the buffer memory. While one LFSR is decoding the incoming block, the other LFSR is providing output signals to correct the previous data block which is leaving the buffer memory as new incoming data arrives.

Journal ArticleDOI
R.L. Van Tuyl1
TL;DR: In this paper, an integrated heterodyne signal-generating GaAs chip is reported, which contains an on-chip local oscillator with external inductors tunable by means of variable capacitors from 2.1 to 2.5 GHz.
Abstract: An integrated heterodyne signal-generating GaAs chip is reported. This circuit contains: an on-chip local oscillator with external inductors tunable by means of on-chip variable capacitors from 2.1 to 2.5 GHz; a doubly balanced mixer with associated drive circuitry; and an IF preamplifier. The circuit delivers +6 dBm (equivalent 50 Ω) into the designed load impedance of 200 Ω with -30-dBc harmonic distortion over a 1.4-GHz 3-dB bandwidth. Circuit elements presented include: a unique variable-threshold limiter, a self-biasing push-pull oscillator, doubly balanced mixer, and a self-biasing unity-gain phase splitting amplifier.

Journal ArticleDOI
TL;DR: Linewidth control using a tri-layer resist system on wafers with topography is investigated in this paper, where an absorbing dye is incorporated in the bottom layer to improve the usable resolution.
Abstract: Linewidth control using a tri-layer resist system on wafers with topography is investigated. An absorbing dye is incorporated in the bottom layer to improve the usable resolution. Resist patterns of 1-µm lines and spaces over aluminized topography are demonstrated using a projection aligner. The advantages of a multilayer system are investigated using an exposure and development simulation program for optical lithography. The relative contributions of planarization and reflection suppression are discussed.