Proceedings ArticleDOI
A 22Gb/s, 10mm on-chip serial link over lossy transmission line with resistive termination
Hyo Gyuem Rhew,Michael P. Flynn,Jun-Young Park +2 more
- pp 233-236
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TLDR
An on-chip serial-link scheme incorporating an interleaved voltage-mode driver, interleaves samplers and an optimally resistively terminated transmission line, enables an energy-efficient very-high-speed long-range data communication.Abstract:
An on-chip serial-link scheme incorporating an interleaved voltage-mode driver, interleaved samplers and an optimally resistively terminated transmission line, enables an energy-efficient very-high-speed long-range data communication. The link is more than twice as fast and more than twice as energy efficient as the fastest reported on-chip link, yet has more than triple the communication range. A 10mm prototype link achieves a data rate of 20Gb/s with an energy consumption of 1.36pJ/b and a measured BER better than 10−11. A 10Gb/s prototype achieves an energy efficiency of 680fJ/b with a measured BER of less than 10−13.read more
Citations
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Journal ArticleDOI
Current-Mode Full-Duplex Transceiver for Lossy On-Chip Global Interconnects
Nijwm Wary,Pradip Mandal +1 more
TL;DR: The proposed hybrid transceiver has a directional inverter/buffer (DIB) circuit which inverts the outbound signal whereas conveys the incoming signal maintaining the same phase with a gain greater than one, making it suitable for lossy on-chip link.
Patent
Double-sampling receiver with dynamic offset modulation for optical and electrical signaling
TL;DR: In this paper, a low-voltage double-sampling technique was proposed to reduce the power consumption of transimpedance-amplifier (TIA) receivers.
Journal ArticleDOI
A low impedance receiver for power efficient current mode signalling across on-chip global interconnects
Nijwm Wary,Pradip Mandal +1 more
TL;DR: A low impedance receiver for on-chip high speed current-mode signalling over global interconnect that provides a very low input impedance even with a low quiescent power and has high transimpedance gain over a large bandwidth.
Journal ArticleDOI
High-speed energy-efficient bi-directional transceiver for on-chip global interconnects
Nijwm Wary,Pradip Mandal +1 more
TL;DR: A new bi-directional transceiver has been proposed for high-speed signalling across on-chip global interconnects and has very low small-signal impedance for both modes of operation and thereby supports high bandwidth of the link.
DissertationDOI
Electrical and Optical Interconnects for High-Performance Computing
TL;DR: A novel RC front-end is proposed that combines dynamic offset modulation and double-sampling techniques to eliminate the need for a short time constant at the input of the receiver, making it suitable for low-power implementations.
References
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Proceedings ArticleDOI
A 0.28pJ/b 2Gb/s/ch Transceiver in 90nm CMOS for 10mm On-Chip interconnects
TL;DR: In this paper, a low-swing transceiver for 10mm-long 0.54mum-wide on-chip interconnects is presented, which uses DFE with a power-efficient continuous-time feedback filter.
Journal ArticleDOI
Distributed Loss-Compensation Techniques for Energy-Efficient Low-Latency On-Chip Communication
Jose Anup P,Kenneth L. Shepard +1 more
TL;DR: Negative impedance converters inserted at regular intervals along an on-chip line are shown to reduce losses from more than 1 dB/mm to less than 0.3 dB/ mm at 10 GHz, a factor-of-three improvement in power and a one-and-a-half-times improvement in latency over an optimally repeated RC line of the same wire width.
Proceedings ArticleDOI
Global signaling over lossy transmission lines
M. P. Flynn,J. J. Kang +1 more
TL;DR: An interconnect scheme based on lossy transmission lines, which is more power efficient than over traditional parallel buses, does not require repeaters and is less affected by noise and coupling is described.
Journal ArticleDOI
A 9-Gbit/s Serial Transceiver for On-Chip Global Signaling Over Lossy Transmission Lines
TL;DR: A 9-Gbit/s serial link transceiver for on-chip global signaling, and techniques for the design of on- chip transmission lines, are presented.
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