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Proceedings ArticleDOI

A 5.4mW 0.07mm 2 2.4GHz Front-End Receiver in 90nm CMOS for IEEE 802.15.4 WPAN

TLDR
The aim of the 2.4GHz front-end receiver presented in this paper is the minimization of both cost and energy consumption, focusing on WPAN IEEE 802.15.4 transceivers, and an area reduction by at least 70% is achieved.
Abstract
The aim of the 2.4GHz front-end receiver presented in this paper is the minimization of both cost and energy consumption, focusing on WPAN IEEE 802.15.4 transceivers. It includes the entire RF part, from the balun to the first stage of the channel filter, as well as the LO signal conditioning cells. The proposed architecture uses an unmatched inductorless LNA and a new clocking scheme on a standard passive mixer. Compared to previously reported IEEE 802.15.4 receivers, an area reduction by at least 70% is achieved. The power consumption is relatively low at 5.4mW with a state-of-the-art noise and linearity performance. The receiver front-end operates at 1.35V. It is implemented in a 90nm CMOS technology using two thick metals, and alucap with RFMOM capacitors.

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Citations
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Proceedings ArticleDOI

A 0.2-to-2.0GHz 65nm CMOS receiver without LNA achieving ≫11dBm IIP3 and ≪6.5 dB NF

TL;DR: In this article, an LNA-less mixer-first receiver is proposed, which achieves a remarkably high spurious-free dynamic range (SFDR) of 79dB in 1MHz bandwidth over a decade of RF frequencies.
Proceedings ArticleDOI

A highly integrated low-power 2.4GHz transceiver using a direct-conversion diversity receiver in 0.18µm CMOS for IEEE802.15.4 WPAN

TL;DR: The IC presented in this paper is a highly integrated low-power RF transceiver for wireless sensor networks (WSN) compliant with the IEEE 802.15.4 2.4GHz WPAN standard that contains a radio controller with sleep timer and can perform higher-level MAC functions autonomously, thereby enabling significant power savings in the overall system.
Journal ArticleDOI

A CMOS Resistive Feedback Differential Low-Noise Amplifier With Enhanced Loop Gain for Digital TV Tuner Applications

TL;DR: In this paper, a resistive feedback differential low-noise amplifier (LNA) with enhanced loop gain is implemented as a part of a DTV tuner using a 0.18-mum CMOS process.
DissertationDOI

Frequency translation techniques for interference-robust software-defined radio receivers

Zhiyu Ru
TL;DR: This thesis focuses on frequency translation (FT) techniques and addresses two key challenges of SDR receivers: the robustness to out-of-band interference (OBI) and the compatibility with CMOS scaling and system-on-chip (SoC) integration.
Journal ArticleDOI

Radio transceivers for wireless personal area networks using IEEE802.15.4

TL;DR: The design considerations for low-power short-range radio transceivers with a focus on the 2.4 GHz PHY layer defined as part of the IEEE 802.15.4 standard are described, which uses a direct-conversion receiver with switched antenna diversity and a transmitter using direct closedloop VCO modulation.
References
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Journal ArticleDOI

A Fully Integrated 2.4-GHz IEEE 802.15.4-Compliant Transceiver for ZigBee™ Applications

TL;DR: A single-chip 2.4-GHz CMOS radio transceiver with integrated baseband processing according to the IEEE 802.15.4 standard is presented and optimization of architecture and circuit design level in order to reduce the transceiver power consumption are described.
Journal ArticleDOI

A Low-Power RF Direct-Conversion Receiver/Transmitter for 2.4-GHz-Band IEEE 802.15.4 Standard in 0.18- $\mu{\hbox {m}}$ CMOS Technology

TL;DR: This paper presents a low-power RF receiver/transmitter front-end for 2.4-GHz-band IEEE 802.15.4 standard in 0.18-mum CMOS technology, which shows high-linearity performance, leading to overall RF receiver linearity improvement.
Journal ArticleDOI

A 2.4-GHz Low-Power Low-IF Receiver and Direct-Conversion Transmitter in 0.18- $\mu{\hbox {m}}$ CMOS for IEEE 802.15.4 WPAN Applications

TL;DR: In this paper, a low-power low-IF receiver and a direct-conversion transmitter suitable for the IEEE standard 802.15.4 radio system at the 2.4 GHz band are presented in 0.18-mum deep n-well CMOS technology.
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