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Proceedings ArticleDOI

A countermeasure against differential power analysis based on random delay insertion

TLDR
A novel gate-level countermeasure is proposed which, exploiting the insertion of random delays in the datapath of a cryptographic processor, allows us to randomize not just the instantaneous current consumption profile but also the total charge quantity transferred from the power supply during a clock cycle.
Abstract
Differential power analysis is widely recognized as an extremely powerful and low-cost technique to extract secret information from cryptographic devices. As a consequence, DPA-countermeasures have been proposed in the technical literature ranging over every abstraction level in an embedded system, from software to transistor-level techniques. In this paper, a novel gate-level countermeasure is proposed which, exploiting the insertion of random delays in the datapath of a cryptographic processor, allows us to randomize not just the instantaneous current consumption profile but also the total charge quantity transferred from the power supply during a clock cycle.

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Citations
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Book ChapterDOI

Three-phase dual-rail pre-charge logic

TL;DR: In this paper, a dual-rail pre-charge logic family whose power consumption is insensitive to unbalanced load conditions is investigated, which allows adopting a semi-custom design flow without any constraint on the routing of the complementary wires.
Book ChapterDOI

An Efficient Method for Random Delay Generation in Embedded Software

TL;DR: In this article, the authors propose a new method for generating random delays and a criterion for measuring the efficiency of a random delay countermeasure against side channel and fault attacks in embedded software.
Journal ArticleDOI

Trustworthiness of Medical Devices and Body Area Networks

TL;DR: This paper discusses trustworthiness concerns in IWMDs and BANs through a comprehensive identification and analysis of potential threats and, for each threat, provides a discussion of the merits and inadequacies of current solutions.
Proceedings ArticleDOI

FPGA implementation and analysis of random delay insertion countermeasure against DPA

TL;DR: It is shown that RDI is an efficient countermeasure technique on FPGA in comparison to other countermeasures and a set of critical parameters that can be utilized to optimize a security algorithm design with RDI in terms of area, speed and power.
Journal ArticleDOI

Delay-Based Dual-Rail Precharge Logic

TL;DR: A dual-rail precharge logic family whose power consumption is insensitive to unbalanced load conditions thus allowing adopting a semi-custom design flow (automatic place and route) without any constraint on the routing of the complementary wires is investigated.
References
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Book ChapterDOI

Differential Power Analysis

TL;DR: In this paper, the authors examine specific methods for analyzing power consumption measurements to find secret keys from tamper resistant devices. And they also discuss approaches for building cryptosystems that can operate securely in existing hardware that leaks information.
Journal ArticleDOI

Examining smart-card security under the threat of power analysis attacks

TL;DR: In this paper, the authors examined the noise characteristics of the power signals and developed an approach to model the signal-to-noise ratio (SNR) using a multiple-bit attack.
Book ChapterDOI

Resistance against Differential Power Analysis for Elliptic Curve Cryptosystems

TL;DR: This paper generalizes DPA attack to elliptic curve (EC) cryptosystems and describes a DPA on EC Diffie-Hellman key exchange and EC EI-Gamal type encryption that enable to recover the private key stored inside the smart-card.
Proceedings Article

A dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards

TL;DR: A set of logic gates and flip-flops needed for cryptographic functions and compared those to Static Complementary CMOS implementations to protect security devices such as smart cards against power attacks are built.
Journal Article

Differential power analysis in the presence of hardware countermeasures

TL;DR: Different ways to attack devices featuring random process interrupts and noisy power consumption are examined.