Open Access
A General Decomposition for Reversible Logic
Marek Perkowski,Lech Jozwiak,Pawel Kerntopf,Alan Mishchenko,Anas N. Al-Rabadi,A. Coppola,Andrzej Buller,Xiaoyu Song,Svetlana Yanushkevich,Vlad Shmerko,Malgorzata Chrzanowska-Jeske,Mozammel H. A. Khan +11 more
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TLDR
This work presents for the first time a method that minimizes concurrently the number of gates, their total delay and the total garbage in reversible logic.Abstract:
Logic synthesis for reversible logic differs considerably from standard logic synthesis. The gates are multi-output and the unutilized outputs from these gates are called “garbage”. One of the synthesis tasks is to reduce the number of garbage signals. Previous approaches to reversible logic synthesis minimized either only the garbage or (predominantly) the number of gates. Here we present for the first time a method that minimizes concurrently the number of gates, their total delay and the total garbage. Our method adopts for reversible logic many ideas developed previously for standard logic synthesis (such as Ashenhurst/Curtis Decomposition, Dietmeyer’s Composition, non-linear preprocessing for BDDs), methods created in ReedMuller Logic (such as Pseudo-Kronecker Decision Diagrams with Complemented Edges, Pseudo-Kronecker Lattice Diagrams and their generalizations) and introduces also new methods specific to reversible logic.read more
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Journal ArticleDOI
Synthesis of reversible logic circuits
TL;DR: In an application important to quantum computing, the synthesis of oracle circuits for Grover's search algorithm are synthesized, and a significant improvement over a previously proposed synthesis algorithm is shown.
Journal ArticleDOI
A Novel Reversible BCD Adder For Nanotechnology Based Systems
Majid Haghparast,Keivan Navi +1 more
TL;DR: It is shown that the proposed reversible BCD adder has lower hardware complexity and it is much better and optimized in terms of number of reversible gates and garbage outputs with compared to the existing counterparts.
Reversible logic synthesis
Gerhard W. Dueck,Dmitri Maslov +1 more
TL;DR: A crucial way to help reversible logic to evolve and become usable is to design a synthesis method which uses the theoretically minimal number of garbage bits, which will help the emerging technologies to use the results of reversible synthesis even in the early stage of their development.
Proceedings ArticleDOI
Reversible logic circuit synthesis
TL;DR: In this article, the authors investigated the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line-pairs (temporary storage channels) and proved constructively that every even permutation can be implemented without temporary storage using NOT, CNOT and TOFFOLI gates.
Design of a Novel Reversible Multiplier Circuit Using HNG Gate in Nanotechnology
TL;DR: A novel 4x4 bit reversible multiplier circuit using HNG gate can multiply two 4-bits binary numbers and can be generalized for NxN bit multiplication.