Journal ArticleDOI
Analysis and optimization of power grids
Sachin S. Sapatnekar,H. Su +1 more
Reads0
Chats0
TLDR
To optimize the networks, the authors call for techniques that reduce noise on the power grid, including topology selection, wire widening, and decoupling-capacitance insertion, combined with supply, signal, and clock network codesign.Abstract:
As the complexity of power and ground networks increases, methods for efficient analysis and aggressive optimization of these networks become essential. Here, the authors describe efficient hierarchical methods for analyzing distribution networks. To optimize the networks, the authors call for techniques that reduce noise on the power grid, including topology selection, wire widening, and decoupling-capacitance insertion, combined with supply, signal, and clock network codesign.read more
Citations
More filters
Journal ArticleDOI
Power grid analysis using random walks
TL;DR: A class of power grid analyzers based on a random-walk technique, with linear runtime and the desirable property of localizing computation is presented, and a single-level hierarchical method is built and extended to multilevel and "virtual-layer" hierarchy.
Journal ArticleDOI
Power Grid Analysis and Optimization Using Algebraic Multigrid
TL;DR: A new AMG-based reduction scheme is proposed to improve the efficiency of reducing the problem size for power grid analysis and optimization and a fast transient-analysis method is developed and extended to an accurate solver with error control mechanism.
Proceedings ArticleDOI
Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors
TL;DR: Experimental results show that power grid noise can be more effectively optimized after the introduction of MIM decaps, with lower leakage power and little increase in the routing congestion, as compared to a solution using CMOS decaps only.
Book
Thermally-Aware Design
TL;DR: The onus on thermal management is beginning to move from the package designer toward the chip designer, and a set of thermal optimization techniques, for controlling on-chip temperatures and limiting the level to which they degrade circuit performance, are described.
Proceedings ArticleDOI
Clock buffer polarity assignment for power noise reduction
TL;DR: This work aims to reduce clock network induced power noise by assigning different signal polarities (opposite switchings) to clock buffers in an existing buffered clock tree by proposing three assignment algorithms.
References
More filters
Journal ArticleDOI
Algorithm 778: L-BFGS-B: Fortran subroutines for large-scale bound-constrained optimization
TL;DR: L-BFGS-B is a limited-memory algorithm for solving large nonlinear optimization problems subject to simple bounds on the variables, intended for problems in which information on the Hessian matrix is difficult to obtain, or for large dense problems.
Journal ArticleDOI
The Generalized Adjoint Network and Network Sensitivities
TL;DR: In this paper, the authors derived a related adjoint network representation and sensitivity coefficients for networks containing a very broad class of elements: those that admit a parametric representation, and a brief discussion is given as to how these results may be exploited in a general automated network design scheme.
Proceedings ArticleDOI
Power supply noise analysis methodology for deep-submicron VLSI chip design
Howard H. Chen,David D. Ling +1 more
TL;DR: A new design methodology to analyzethe on-chip power supply noise for high-performance microprocessors based on an integrated package-level and chip-level power bus model, and a simulated switching circuit model for each functional block offers the most complete and accurate analysis of Vdd distribution.
Journal ArticleDOI
Hierarchical analysis of power distribution networks
TL;DR: This paper presents a new technique for analyzing a power grid using macromodels that are created for a set of partitions of the grid, and shows that even for a 60 million-node power grid, the approach allows for an efficient analysis, whereas previous approaches have been unable to handle power grids of such size.
Journal ArticleDOI
A multigrid-like technique for power grid analysis
TL;DR: Experimental results show that the proposed method is very efficient as well as suitable for both DC and transient analysis of power grids, and reduced to a coarser structure, and the solution is mapped back to the original grid.