Patent
Customizable and programmable cell array
TLDR
In this article, a customizable logic array including an array of programmable cells having a multiplicity of inputs and amultiplicity of outputs and customized interconnections providing permanent direct interconnection among at least a plurality of the multiplicity inputs and at least the plurality of outputs was described.Abstract:
This invention discloses a customizable logic array including an array of programmable cells having a multiplicity of inputs and a multiplicity of outputs; and customized interconnections providing permanent direct interconnections among at least a plurality of the multiplicity of inputs and at least a plurality of the multiplicity of outputs.read more
Citations
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Patent
System comprising a semiconductor device and structure
Zvi Or-Bach,Brian Cronquist,Israel Beinglass,Jan Lodewijk de Jong,Deepak C. Sekar,Zeev Wurman +5 more
TL;DR: In this article, a system includes a semiconductor device consisting of a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single-crystalline silicon layer.
Patent
Semiconductor device and structure
Zvi Or-Bach,Brian Cronquist +1 more
TL;DR: In this paper, a first layer and a second layer of layer-transferred mono-crystallized silicon, where the first layer comprises a first plurality of horizontally-oriented transistors, and the second layer includes a second plurality of vertically oriented transistors.
Patent
Method for fabrication of a semiconductor device and structure
TL;DR: In this article, a method to process an Integrated Circuit device including processing a first layer of first transistors, then processing a metal layer overlaying the first layer and providing at least one connection to the first Transistors, and finally processing a second layer of second transistors overlaying a first metal layer, wherein the second metal layer is connected to provide power to at least 1 of the second Transistors.
Proceedings ArticleDOI
Exploring regular fabrics to optimize the performance-cost trade-off
Larry Pileggi,Herman Schmit,Andrzej J. Strojwas,P. Gopalakrishnan,Veerbhan Kheterpal,Aneesh Koorapaty,C. Patel,Vyacheslav Rovner,K. Y. Tong +8 more
TL;DR: Some of the trade-offs to consider for determination of how much regularity a particular IC or application can afford are discussed, and a Via Patterned Gate Array is proposed as one such example.
Patent
Structured integrated circuit device
Zvi Or-Bach,Petrica Avram,Romeo Iacobut,Adrian Apostol,Ze Ev Wurman,Adam Leventhal,Richard Zeman +6 more
TL;DR: A configurable logic array may include: a multiplicity of logic cells, containing look-up tables; customizable metal and via connection layers overlaying the multiplicity, where the customizations are all done on a single via layer.
References
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Patent
Programmable interconnect architecture
TL;DR: In this article, a user-configurable circuit architecture includes a two-dimensional array of functional circuit modules disposed within a semiconductor substrate, and a plurality of userconfigurable interconnect elements are placed directly between the second and third interconnect layers.
Patent
Configurable logic element
TL;DR: A configurable logic circuit achieves versatility by including a configurable combinational logic element, configurable storage circuit, and configurable output select logic as discussed by the authors, which can be configured to operate as a D flip flop, an RS latch, a transparent latch with or without set and reset inputs, or as an edge detector.
Patent
Time multiplexed programmable logic device
TL;DR: A programmable logic device (PLD) as mentioned in this paper comprises a plurality of configurable logic blocks (CLBs), an interconnect structure for interconnecting the CLBs, and a multiplicative array of memory cells.
Patent
Apparatus and method for synthesizing integrated circuits using parameterized HDL modules
TL;DR: In this article, a method and apparatus for designing circuits uses parameterized Hardware Description Language (HDL) modules stored in a library and a datapath synthesizer accesses the library and assigns values to parameters to form specific implementations of the HDL modules.