Patent
Integrated low k dielectrics and etch stops
Claes H. Bjorkman,Yu Melissa Min,Hongquing Shan,David Cheung,Wai-Fan Yau,Kuo-Wei Liu,Nasreen Gazala Chopra,Gerald Zheyao Yin,Farhad Moghadam,Judy H. Huang,Dennis J. Yost,Betty Tang,Yunsang Kim +12 more
TLDR
In this paper, a method of depositing and etching dielectric layers has been proposed for the formation of horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide.Abstract:
A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnectsread more
Citations
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Patent
Semiconductor device, and manufacturing method thereof
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Patent
Plasma processes for depositing low dielectric constant films
David Cheung,Wai-Fan Yau,Robert P. Mandal,Shin-Puu Jeng,Kuo-Wei Liu,Yung-Cheng Lu,Michael Barnes,Ralf B. Willecke,Farhad Moghadam,Tetsuya Ishikawa,Tze Wing Poon +10 more
TL;DR: In this article, a method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas comprising carbon at a constant RF power level is presented.
Patent
Dual gas faceplate for a showerhead in a semiconductor wafer processing system
Abstract: A faceplate for a showerhead of a semiconductor wafer processing system is provided. The faceplate has a plurality of gas passageways to provide a plurality of gases to the process region without commingling those gases before they reach the processing region within a reaction chamber. The showerhead includes a faceplate and a gas distribution manifold assembly. The faceplate defines a plurality of first gas holes that carry a first gas from the manifold assembly through the faceplate to the process region, and a plurality of channels that couple a plurality of second gas holes to a radial plenum that receives the second gas from the manifold assembly. The faceplate and the manifold assembly are each fabricated from a substantially solid nickel material.
Patent
Process for modifying offset voltage characteristics of an interferometric modulator
TL;DR: In this paper, a process for modifying the processing parameters to shift the non-zero offset voltage closer to zero has been developed, which may have improved performance and/or simpler drive schemes.
Patent
Method of depositing a low k dielectric with organo silane
TL;DR: A method and apparatus for depositing a low dielectric constant film by reaction of an organo silane compound and an oxidizing gas is described in this paper. But it is not suitable for use as a cap layer.
References
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Patent
Plasma processes for depositing low dielectric constant films
David Cheung,Wai-Fan Yau,Robert P. Mandal,Shin-Puu Jeng,Kuo-Wei Liu,Yung-Cheng Lu,Michael Barnes,Ralf B. Willecke,Farhad Moghadam,Tetsuya Ishikawa,Tze Wing Poon +10 more
TL;DR: In this article, a method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas comprising carbon at a constant RF power level is presented.
Patent
Method for producing coplanar multi-level metal/insulator films on a substrate and for forming patterned conductive lines simultaneously with stud vias
Melanie Min-Chieh Chow,John Edward Cronin,William Leslie Guthrie,Carter Welling Kaanta,Barbara Jean Luther,William John Patrick,Kathleen Alice Perry,Charles L. Standley +7 more
TL;DR: In this article, a planarized layer of insulation is deposited over a first level of patterned conductive material to which contacts are to be selectively established, and the first layer then is covered by an etch stop material.
Patent
Process for forming silicon oxide film
TL;DR: In this article, the authors describe a process for forming a silicon oxide film comprising the step of depositing a thin film of a silanol, a polymer thereof or a siloxane polymer, each containing an organic group, on a substrate by exciting a gas containing an organosilane or organosILoxane gas and a gas contained H and OH on the substrate in a reaction chamber to cause a reaction in a gas phase or on the substrates and removing the organic group from the thin film by plasma treatment.
Patent
Silicone polymer insulation film on semiconductor substrate and method for forming the film
TL;DR: In this article, a silicone polymer insulation film having low relative dielectric constant, high thermal stability and high humidity-resistance on a semiconductor substrate is applied to a plasma CVD apparatus, where the first step is vaporizing a silicon-containing hydrocarbon compound expressed by the general formula Si α O β C x H y (α=3, β=3 or 4, x, and y are integers).
Patent
Hydrogenated oxidized silicon carbon material
TL;DR: In this paper, a low dielectric constant, thermally stable hydrogenated oxidized silicon carbon (HOSOC) film which can be used as an interconnect dielectrics in IC chips is disclosed.