IEEE TRANSACTIONS ON POWER ELECTRONICS 1
Large Step Ratio Input-Series-Output-Parallel
Chain-Link DC-DC Converter
Xiaotian Zhang, Member, IEEE , Mofan Tian, Student Member, IEEE, Xin Xiang, Student Member, IEEE , Javier
Pereda, Member, IEEE , Timothy C. Green, Senior Member, IEEE, and Xu Yang, Member, IEEE
Abstract—High-voltage and high-power dc-dc conversion is key
to dc transmission, distribution and generation, which require
compact and efficient dc transformers with large step ratios. This
paper introduces a dc-dc converter with the input-series-output-
parallel (ISOP) arrangement of multiple high step ratio sub-
converter units. Each sub-converter unit is an isolated modular
dc-dc converter with a stack of half-bridge cells chopping the dc
down to low voltage level. The transformer provides galvanic
isolation and additional step ratio. The converter achieves a
large step ratio due to the combination of the series-parallel
configuration, the modular cells, and the isolation transformer.
The proposed dc-dc converter is analyzed in a 30 kV to 1 kV,
1 MW application to discuss the operation performance, trade-
offs, power efficiency and selection of components. Finally,
the converter is validated through a laboratory down-scaled
prototype.
Index Terms—Large step ratio, medium voltage converter, dc
transformer, modular multilevel converter.
I. INTRODUCTION
V
OLTAGE Source Converter (VSC) is considered as the
suitable technology for the future HVDC applications,
among which the modular multilevel converter (MMC) is the
most promising architecture [1]–[5]. The MMC has a modular
design using series-connected sub-modules (SMs) that form a
stack to provide high voltage generating capability. Therefore,
each stack can be operated as a controlled voltage source and
the MMC can be implemented in high voltage dc-dc and dc-ac
applications.
There are several applications of dc-dc converters in dc
grids. The most common example is the point-to-point con-
nection, where the dc-links are likely to operate at different
voltage levels. Therefore, a dc transformer is required to con-
nect them with relatively small voltage difference, providing
a low step ratio on the dc voltage and full power capacity
at high efficiency. Suitable converters, using a front-to-front
arrangement of two VSCs linked by an ac transformer, have
been discussed in [6]–[11]. The galvanic isolation can also
be used to provide firewalling capabilities between two dc
Manuscript received February 07, 2018; revised April 27, 2018 and June
29, 2018; accepted July 27, 2018. This work was supported by the National
Key R&D Program of China 2018YFB0904600.
Xiaotian Zhang, Mofan Tian and Xu Yang are with the Department of
Electrical Engineering, Xi’an Jiaotong University, Xi’an, 710049, China (e-
mail: xiaotian@xjtu.edu.cn; tianmofan@outlook.com; yangxu@xjtu.edu.cn).
Xin Xiang and Timothy C. Green are with the Department of Electrical
Engineering, Imperial College London, London, SW7 2AZ, UK (e-mail:
x.xiang14@imperial.ac.uk; t.green@imperial.ac.uk).
Javier Pereda is with the Electrical Engineering Department, Pontif-
icia Universidad Catolica de Chile, Santiago, 7820436, Chile (e-mail:
jepereda@ing.puc.cl).
networks and isolate dc faults on one network to not affect
the other [12]–[15]. Alternatively, using hybrid architectures
with modular cells and switches are also proposed for low cost
purpose, particularly suitable for interconnecting dc links with
small voltage difference [16].
High voltage power systems have to feed medium or low
voltage dc networks, and typically only require a fraction of
the power rating of the high-voltage line, which is normally
rated below 10% [17]. However, the converter must provide
high step ratios of 10 : 1 or more. Some topologies and general
modular dc-dc converters have been proposed to address these
challenges [18], [19]. Additionally, in some other applications
such as offshore wind farms, the collector system can be done
with pure dc-dc conversion [20]–[22]. These growing needs for
high step ratio dc-dc conversion bring new challenges to the
configuration and control of power electronics based system.
This paper proposes a large step ratio dc-dc converter
topology composed of several medium power sub-converters
connected in series-input-output-parallel (ISOP) configuration
using isolation transformers. Each sub-converter is an isolated
dc-dc converter with a MMC topology in the high voltage
side and a bridge rectifier in the low voltage side. The MMC
is a stack of half-bridge cells that generates a three level
voltage under fixed frequency resonant operation mode, using
phase-shift control to regulate the output voltage [23], [24].
Therefore, the step ratio in the sub-converter is achieved
through three factors: the stack step ratio, the phase-shift mod-
ulation, and the turn ratio of isolation transformer. Moreover,
the sub-converters are connected with the ISOP arrangement,
which implements a large step ratio converter architecture.
The following sections present the topology, the operation
principle, the theoretical analysis, the converter application
example and the laboratory scale prototype to validate the
proposed converter.
II. CONFIGURATION OF ISOP CHAIN-LINK DC-DC
CONVERTER
This section presents the circuit configuration of the pro-
posed converter and explains the sub-converter topology and
the ISOP configuration. The proposed converter is conceived
for HVDC tapping applications, which are normally rated
below 10% of the link’s power rating. Therefore, the entire
converter will be considered as a VSC for the analysis.
A. Circuit Topology of Isolated Chain-Link DC-DC Converter
The basic step ratio of the proposed configuration is accom-
plished by sub-converter units. Each sub-converter has a stack
2 IEEE TRANSACTIONS ON POWER ELECTRONICS
Cell 1 Cell N
(a)
Cell 1 Cell N
(b)
Cell 1 Cell N
(c)
Cell 1 Cell N
(d)
Fig. 1. Circuit topology of the N-cell isolated chain-link dc-dc converters
with (a) half-wave rectifier. (b) voltage doubled half-wave rectifier. (c) half-
bridge rectifier. (d) full-bridge rectifier.
of cells that supports high-voltage differences and provides
excitation to a resonant tank connected to the transformer.
A series-parallel resonant tanks is used where the resonance
is between the series inductors L
s
, series capacitors C
s
and
parallel inductors L
p
(Fig. 1). The parallel inductor L
p
can
provide a path for the stack dc current flowing back to the high
voltage side. On the other hand, the series capacitor can block
any dc voltage component causing the isolation transformer
saturation. These components are essential to guarantee the
normal function of the sub-converter. The cells can be imple-
mented by half or full bridges, or a combination of both types.
The transformer isolates and steps down the voltage which
output is rectified and filter by the output capacitor C
o
. As a
result, the output voltage v
o
is stepped down from V
dc
by the
operation of chain-link stack, resonant tank and the isolation
transformer. The selection of the rectifier topology depends on
the requirement of the application. Fig. 1(a) shows a basic fly-
back topology with a half-wave rectifier. Fig. 1(b) shows an
additional diode-capacitor stage on the secondary side of the
topology in Fig. 1(a). This gives a doubled dc output voltage
v
o
. Furthermore, the topology in Fig. 1(a) can be modified
to have bipolar output, as is shown in Fig. 1(c). Finally,
Fig. 1(d) shows the topology with full-wave rectifier, with
reduced voltage and current stresses on the rectifier devices.
DC-DC 1
DC-DC 2
DC-DC M
Fig. 2. Circuit configuration of the M-unit ISOP chain-link dc-dc converter.
B. Circuit topology of ISOP Connection of Sub-converters
The ISOP connection of the isolated sub-converters further
increases the entire step ratio and power rating of the converter
[25]. The circuit configuration of the ISOP connected sub-
converters are shown in Fig. 2, where the isolated sub-
converter unit illustrated in Fig. 1 is represented by a dc-
dc converter block. There are M units in series-parallel
connection in the entire converter. On top of the conversion
ratio from a single sub-converter, the step ratio of the entire
converter is multiplied by a factor of M.
C. Large Step Ratio of the Entire Converter
The large step ratio of the converter γ
ISOP
is fulfilled by
the series-parallel connection ratio M, the voltage ratio of the
sub-converter stack cells γ
S
, the resonant conversion step ratio
γ
R
, and the transformer voltage ratio γ
T
:
γ
ISOP
= γ
S
γ
R
γ
T
M. (1)
The ISOP ratio M is the number of sub-converter units
used. The stack voltage step γ
S
is the ratio between V
dc
and
V
p
, where V
p
is the amplitude of the voltage across the parallel
inductor v
p
. The maximum step ratio of γ
S
= 2N − 1 can be
achieved by using two-level stack voltage modulation [26],
which resonant operation also gives a step ratio of γ
R
= 1.
However, compared to the converter in [26], the proposed
converter has a different arrangement of the resonant tank to
guarantee normal operation of transformer. Moreover, with the
modified modulation generating multilevel stack voltage, the
step ratio of γ
S
is different. The step ratio γ
R
can also be
regulated by the pulse width of the stack voltage [27].
III. OPERATION PRINCIPAL AND STEP RATIO OF
CHIAN-LINK DC-DC SUB-CONVERTER UNIT
A. Fixed Frequency Modulation of Chain-Link DC-DC Sub-
Converter Unit
Modulation and control of the chain-link can determine the
operation mode of the sub-converter unit, achieving a flexible
IEEE TRANSACTIONS ON POWER ELECTRONICS 3
Fig. 3. Circuit diagram of the three-cell chain-link dc-dc sub-converter.
step ratio. Although there could be many control schemes, the
fixed-frequency series-parallel resonant operation with fixed
voltage levels is demonstrated in this paper.
The control method generating drive signals is demonstrated
based on a sub-converter unit with three cells and a full-wave
rectifier. The circuit diagram of the sub-converter unit is shown
in Fig. 3.
For the sub-converter unit in Fig. 3, the stack operates with
a three-level voltage. The general voltage waveforms of the
three-cell converter in time-domain is shown in Fig. 4. In one
switching cycle T
s
, each cell output voltage has two “one
states” with the cell’s upper switch turned on and two “zero
states” with the cell’s lower switch turned on. The voltage
waveforms of the cells v
1
, v
2
, and v
3
are phase-shifted by
120
◦
. This results in a stack voltage v
s
with tripled ripple
frequency. The transformer voltage on the primary side v
a
is
therefore obtained by deducting v
s
from V
dc
. The equivalent
operating cycle T
e
of v
a
is a third of the cycle T
s
.
The fixed-frequency phase-shift gating scheme is used for
power regulation. By regulating the time duration of “one
states” of v
1
, v
2
, and v
3
in Fig. 4, the pulse width of v
s
can
be controlled. If the difference between the time durations
of two adjacent “one states” is increased, the pulse width
of v
s
will be increased. The maximum pulse width that v
s
can achieve is shown in Fig. 5, where v
s
is almost a two-
level voltage with two cell capacitor voltages swing. This
modulation waveform gives the maximum power to the low
voltage side. The equivalent operating cycle is still the same
as that in Fig. 4.
To reduce the pulse width of v
s
, the difference between time
durations of the two adjacent “one states” of v
1
, v
2
, and v
3
has to be reduced. The minimum pulse width of v
s
and v
p
is obtained when time durations of the two “one states” of
each cell output voltage has negligible difference. The time-
0
0
0
0
Fig. 4. The general time-domain voltage waveforms of the three-cell chain-
link dc-dc converters.
0
0
0
0
Fig. 5. Time-domain voltage waveforms of the three-cell chain-link dc-dc
converters with maximum pulse width.
0
0
0
0
Fig. 6. Time-domain voltage waveforms of the three-cell chain-link dc-dc
converters with minimum pulse width.
domain voltage waveforms of the three-cell converter is shown
in Fig. 6. In that case, the power transmitted to the low voltage
side is minimized.
The “zero states” of v
1
, v
2
, and v
3
in Fig. 4, Fig. 5, and
4 IEEE TRANSACTIONS ON POWER ELECTRONICS
0
0
0
0
(a) (b)
Fig. 7. Time-domain key waveforms of the converter with (a) a light load
and (b) a heavy load.
Fig. 6 are all keeping the fixed time duration. Under all
circumstances with different pulse width, the cell capacitors
join and quit the operation following a uniform sequence.
As the amplitude V
p
is related to the output voltage directly,
each cell capacitor voltage is clamped by V
p
. Therefore, the
inherent-balancing of the SM capacitors in a sub-converter
unit is achieved. The detailed analysis will be presented in the
following subsections.
B. Resonant Operation of Chain-Link Unit with Fixed Fre-
quency
The equivalent operating frequency of the sub-converter unit
is selected to be close to the resonant frequency. The fixed
frequency resonant operation of the chain-link unit is analyzed
in this subsection.
The time-domain voltage waveform in Fig. 4 is used as a
general case. The stack voltage v
s
of the sub-converter unit
results in a three-level ac voltage v
a
on the parallel inductor
L
p
. The parallel current i
p
has a trapezoidal waveshape with
equivalent cycle T
e
. The current i
p
rises when v
p
> 0 and
falls when v
p
< 0. It has a flat slope when v
p
= 0. The
average value of i
p
depends on the dc input power of the unit.
If the load current is low, the dc component of i
p
is close to
zero. Fig. 7(a) shows the voltage and current waveforms of a
sub-converter unit with a light load. The transformer primary
side current i
a
has a resonant waveshape. If the voltage v
p
is a
two-level square wave, the current i
a
is completely sinusoidal.
With fixed frequency modulation, the pulse width of v
p
is
adjusted. When v
p
reaches zero, i
a
is forced to zero. As
a result, the waveform of i
a
can be obtained as shown in
Fig. 7(a). Therefore, the stack current i
s
is a sum of i
a
and
i
p
, which is also shown in Fig. 7(a).
If the load current is high, the parallel current i
p
has a higher
average value but keeps the same ac amplitude. However,
owing to the high power transmitted, i
a
has a high amplitude
as well. This results in a stack current i
s
with higher dc and ac
components. The voltage and current waveforms of the sub-
converter unit with a heavy load can be observed in Fig. 7(b).
C. Step Ratio Analysis
To study the step ratio of the sub-converter unit, the voltage
on the resonant capacitor C
s
is defined as v
r
. The current i
a
and the voltage v
r
in the resonant tank can be written as
d
dt
i
a
(t)
v
r
(t)
=
0 −
1
L
s
1
C
s
0
i
a
(t)
v
r
(t)
+
V
p
−V
a
L
s
0
. (2)
At the time t
0
when i
a
starts to resonate, the value of i
a
is equal to zero (Fig. 7). This resonant operation terminates
at the time t
1
when v
p
falls to zero. As a result, the initial
condition for this system is i
a
(t
0
) = 0 and v
r
(t
0
), where V
a
is the voltage amplitude of primary side of the transformer.
Hence, the time-domain current and voltage from t
0
to t
1
can
be derived as
i
a
(t) =
V
p
− V
a
− v
r
(t
0
)
Z
0
sinω(t − t
0
) (3)
and
v
r
(t) = (V
p
−V
a
)(1−cosω(t −t
0
))+v
r
(t
0
)cosω(t −t
0
) (4)
with Z
0
=
p
L
s
/C
s
and ω = 1/
√
L
s
C
s
the characteristic
impedance and angular frequency of the resonant tank, re-
spectively. From t
0
to t
1
, the average power flowing into the
resonant tank over an operating cycle can be derived as
P
1
=
V
p
(V
p
− V
a
− v
r
(t
0
))
πZ
0
(1 − cosα) (5)
with α varying from 0 to π radians to represent the pulse
width of v
p
. After t
1
, the voltage v
p
equals to zero while the
current i
a
still resonates until it reaches zero at the time instant
t
2
. According to (2), with the initial conditions of i
a
(t
1
) and
v
r
(t
1
). The time-domain current and voltage from t
1
to t
2
are
written as
i
a
(t) = i(t
1
)cosω(t − t
1
) −
v
r
(t
1
) + V
a
Z
0
sinω(t − t
1
) (6)
and
v
r
(t) = − V
a
(1 − cosω(t − t
1
)) + v
r
(t
1
)cosω(t − t
1
)
+ i
a
(t
1
)Z
0
sinω(t − t
1
).
(7)
The power flowing into the resonant tank from t
1
to t
2
averaged over an operating cycle can be derived as
P
2
=
V
p
(V
p
− V
a
− v
r
(t
0
))[cosα − cos(α + β)]
πZ
0
+
V
2
p
(cosβ − 1)
πZ
0
(8)
with β = (t
2
− t
1
)/π. Hence, the total power flowing into the
resonant tank can be obtained as
P =
V
p
(V
p
− V
a
− v
r
(t
0
))[1 − cos(α + β)]
πZ
0
+
V
2
p
(cosβ − 1)
πZ
0
.
(9)
To simplify the analysis, the converter is assumed to be
lossless. The power flowing into the resonant tank is equal to
the output power, yielding
P =
V
2
o
R
. (10)
The transformer step ratio is γ
T
= V
a
/V
o
and the step
ratio of resonant conversion is γ
R
= V
p
/V
a
. By substituting
IEEE TRANSACTIONS ON POWER ELECTRONICS 5
0 π/6 π/3 π/2 2π/3 5π/6 π
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
3
(rad)
R
Q=0.01
Q=0.02
Q=0.05
Q=0.1
Q=0.2
Fig. 8. Regulation of resonant conversion ratio γ
R
under different quality
factors.
i
a
(t
2
) = 0 and v
r
(t
2
) = −v
r
(t
0
) into (6) and (7), respectively,
with the elimination of v
r
(t
0
) by combining (9) and (10), the
step ratio of resonant conversion γ
R
can be obtained as
cos(α + β) −cos(β)
sin(α + β) −sin(β)
γ
2
R
− γ
R
+
Q
2
γ
2
R
=
−
Q
2
− γ
R
0
(11)
with Q =
πZ
0
γ
2
T
R
the quality factor. The change of γ
R
versus
the pulse width of v
s
under different quality factors is shown
in Fig.8. It can be seen that a flexible step ratio γ
R
can be
achieved by adjusting the pulse width of v
s
, i.e., regulating α
from 0 to π.
Moreover, with a larger Q, the step ratio γ
R
has a lower
sensitivity versus the variance of α. As a result, a small Z
0
will
be more applicable to meet the voltage regulation requirement
with intensive load change.
On the other hand, a smaller characteristic impedance will
result in a larger resonant current i
a
(according to (3)),
which increases unnecessary losses in the resonant tank. The
selection of Z
0
should also take the transformer turn ratio into
account to achieve the entire required step ratio. The detailed
design of the dc-dc converter will be presented in next section.
IV. LARGE STEP RATIO CONVERSION OF ISOP
CHAIN-LINK DC-DC CONVERTER
In order to achieve large step ratio dc-dc conversion, dif-
ferent configuration options can be used. In this section, the
application of a 30 kV to 1 kV, 1 MW dc-dc converter
is demonstrated and the trade-offs between two different
configurations are discussed.
A. Selection of Series-Parallel Units and Sub-Modules
A step-down ratio of γ
ISOP
= 30 from the high voltage
dc to the low voltage dc is required. Taking the voltage and
current ratings in commercial power devices into account, the
series-parallel units and bridge modules should be capable of
withstanding the high voltage dc. For an N -cell chain-link dc-
dc converter illustrated in Fig. 3, the average dc voltage of v
s
TABLE I
CONFIGURATION OF THE ISOP DC-DC CONVERTER
N M γ
S
M V
C
Total cell number
3 6 12 2.5 kV 18
4 4 12 2.5 kV 16
5 3 12 2.5 kV 15
6 2 10 3.0 kV 12
7 2 12 2.5 kV 14
is equal to (N − 1)v
C
. Hence, the cell capacitor voltage is
written as v
C
= V
dc
/(N − 1). The voltage amplitude V
p
is
equal to v
C
, yielding the stack step ratio of the N -cell chain-
link
γ
s
= N − 1. (12)
For M units connected in input-series-output-parallel man-
ner, the dc voltage across the sub-converter unit is
V
dc
=
V
i
M
. (13)
Therefore, the voltage across a single switch is observed by
the cell capacitor voltage, namely
v
C
=
V
i
M(N − 1)
. (14)
It can be seen from (14) that with larger numbers of
M and N, the switch voltage stress is lower. However, a
high conversion ratio of γ
S
may result in a high current
flowing through the stack. This increases the current stress and
semiconductor losses, leading to a lower conversion efficiency.
To reduce the conversion losses, the cell number N is usually
selected to be small to achieve a low γ
S
.
The step-down ratio and voltage stress of the available
configurations of the series-parallel sub-converter units and
cells are listed in Table I. The configuration of N = 3 and
M = 6 is used, based on which the transformer turn ratio is
selected.
B. Step Ratio of the Resonant Tank and Isolation Transformer
The step ratio of the sub-converter unit is dependent on
stack step ratio γ
S
, the turn-ratio γ
T
of the transformer and
the resonant conversion ratio γ
R
. Assume that the chain-
link voltage v
s
is controlled to step between N − 2 levels
to N levels with the equivalent operating frequency f
e
. If
the resonant frequency of the resonant tank is equal to the
equivalent frequency,
f
e
=
1
2π
√
L
s
C
s
. (15)
It can be seen that with higher equivalent operating fre-
quency, the inductance and capacitance in the resonant tank
will decrease. The volume of the passive components in the
converter can be reduced with a slight sacrifice on switching
losses.
The isolation transformer affects the total step ratio γ
ISOP
.
With a larger transformer turn ratio γ
T
, a higher step ratio
of the sub-converter unit can be achieved. However, high
insulation grade and coupling coefficient may result in low
efficiency and large volume of the transformer. Meanwhile,
