Proceedings ArticleDOI
Router Buffer Caching for Managing Shared Cache Blocks in Tiled Multi-Core Processors
Joe Augustine,Raghavendra K,John Jose,Madhu Mutyam +3 more
- pp 239-246
TLDR
Wang et al. as mentioned in this paper proposed a congestion management technique in the LLC that equips the NoC router with small storage to keep a copy of heavily shared cache blocks, and also propose a prediction classifier in LLC controller.Citations
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Journal ArticleDOI
NCDE: In-Network Caching for Directory Entries to Expedite Data Access in Tiled-Chip Multiprocessors
TL;DR: In this paper , the authors explore the opportunity of mitigating problems associated with shared data access via in-network caching for directory entries (NCDE), which can utilize every input port's virtual channels to hold directory entries.
Journal ArticleDOI
NCDE: In-Network Caching for Directory Entries to Expedite Data Access in Tiled-Chip Multiprocessors
TL;DR: In this paper , the authors explore the opportunity of mitigating problems associated with shared data access via in-network caching for directory entries (NCDE), which can utilize every input port's virtual channels to hold directory entries.
References
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Proceedings ArticleDOI
Network caching for Chip Multiprocessors
TL;DR: This paper develops three network caching designs to reduce L1 miss latencies and demonstrates that network caching architecture provides good scalability and also provides robust performance.
Book ChapterDOI
In-Network Caching for Chip Multiprocessors
Aditya Yanamandra,Mary Jane Irwin,Vijaykrishnan Narayanan,Mahmut Kandemir,Sri Hari Krishna Narayanan +4 more
TL;DR: In the proposed technique, shared data from read response packets that pass through the router are cached in its data store to reduce number of hops required to service future read requests and have the potential to reduce memory access latency.
Proceedings ArticleDOI
Network Victim Cache: Leveraging Network-on-Chip for Managing Shared Caches in Chip Multiprocessors
TL;DR: The network victim cache architecture removes the directory structure from shared L2 caches and stores directory information for the blocks recently cached by L1 caches in the network interface components decreasing on-chip directory memory overhead and improves the scalability.
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