scispace - formally typeset
Patent

Semiconductor device substrate and process for preparing the same

TLDR
In this article, a process for preparing a semiconductor device substrate comprises a step of making at least one surface of a first substrate composed of Si material porous, oxidizing inside walls of pores in the resulting porous Si surface layer, forming a monocrystalline Si layer on the porous Si layer, and bonding the mon-coalescence Si layer to one substrate through an insulating layer therebetween.
Abstract
A process for preparing a semiconductor device substrate comprises a step of making at least one surface of a first substrate composed of Si material porous, a step of oxidizing inside walls of pores in the resulting porous Si surface layer, a step of forming a monocrystalline Si layer on the porous Si surface layer, a step of bonding the monocrystalline Si layer to one surface of a second substrate through an insulating layer therebetween, a first etching step of removing the first substrate by selective etching except for the porous Si layer, and a second etching step of impregnating the porous Si layer exposed by the removal of the first substrate with hydrofluoric acid or a first liquid mixture of hydrofluoric acid and at least one of an alcohol and a hydrogen peroxide solution, or by buffered hydrofluoric acid or a second liquid mixture of bufffered hydrofluoric acid and at least one of an alcohol and an hydrogen peroxide solution, thereby selectively removing the porous Si layer.

read more

Citations
More filters
Patent

System comprising a semiconductor device and structure

TL;DR: In this article, a system includes a semiconductor device consisting of a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single-crystalline silicon layer.
Patent

Semiconductor device and structure

TL;DR: In this paper, a first layer and a second layer of layer-transferred mono-crystallized silicon, where the first layer comprises a first plurality of horizontally-oriented transistors, and the second layer includes a second plurality of vertically oriented transistors.
Patent

Method for fabrication of a semiconductor device and structure

TL;DR: In this article, a method to process an Integrated Circuit device including processing a first layer of first transistors, then processing a metal layer overlaying the first layer and providing at least one connection to the first Transistors, and finally processing a second layer of second transistors overlaying a first metal layer, wherein the second metal layer is connected to provide power to at least 1 of the second Transistors.
Patent

Controlled cleaving process

TL;DR: In this paper, an energy source is directed to a selected region of the donor substrate to initiate a controlled cleaving action of the substrate (10) at the selected depth (20), whereupon the cleaving activity provides an expanding cleave front to free the donor material from a remaining portion of the remaining portion.
Patent

Method and device for controlled cleaving process

TL;DR: In this paper, an energy source such as pressurized fluid is directed to a selected region of the donor substrate to initiate a controlled cleaving action of the substrate at the selected depth (20 ).
References
More filters
Journal ArticleDOI

Electrolytic shaping of germanium and silicon

TL;DR: In this article, the properties of electrolyte-semiconductor barriers are described, with emphasis on germanium, and the use of these barriers in localizing electrolytic etching is discussed.
Patent

Method of producing a thin silicon-on-insulator layer

TL;DR: In this paper, a process for fabricating thin film silicon wafers using a novel etch stop composed of a silicon-germanium alloy (24) was proposed.
Patent

Method of producing semiconductor substrate

TL;DR: In this article, a method of making a silicon substrate porous, forming a silicon single crystal on the porous substrate and oxidizing the porous silicon substrate to form a semiconductor layer having good crystallinity on an insulating support, particularly a support having light transmission is presented.
Journal ArticleDOI

Silicon on insulator material by wafer bonding

TL;DR: In this article, a detailed description of the thermal bonding technique and the ensuing wafer thinning processes for making SOI of various film thicknesses is given. And a comparison of selective etch-back chemistry with different etchstop fabrication techniques is presented.
Related Papers (5)