Patent
Semiconductor device with insulating isolation groove
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TLDR
In this article, a semiconductor device comprising an insulating isolation groove which comprises a groove in a substrate, a polycrystal silicon film and a boron phosphosilicate glass film in order embedded within the groove, and a silicon oxide film on the BORON PHOSILISILIC glass film is described.Abstract:
A semiconductor device comprising an insulating isolation groove which comprises a groove in a substrate, an insulating film on the inner surface of the groove, a polycrystal silicon film and a boron phosphosilicate glass film in order embedded within the groove, and a silicon oxide film on the boron phosphosilicate glass film. Since the polycrystal silicon film and boron phosphosilicate glass film are embedded within the groove, the crystal defect due to thermal expansion does not occur. And, since it is not necessary to oxidize the surface of the polycrystal silicon film within the groove, deformation due to an increased build-up at the time of oxidation does not occur.read more
Citations
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Method for Fabricating Semiconductor Device
TL;DR: In this article, a method for fabricating a semiconductor device, in which a lifting phenomenon can be prevented from occurring in forming an amorphous carbon film on an etched layer having tensile stress, was proposed.
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TL;DR: In this paper, an improved process and liner for trench isolation which includes either a single oxynitride layer or a dual oxide/nitride layer was proposed. But the process window was not extended.
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TL;DR: In this article, a thin layer of silicon dioxide is chemically vapor deposited over the trench isolation region and adjacent active region, and a transistor gate electrode is subsequently formed over the thin layer.
References
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Patent
Submerged wall isolation of silicon islands
TL;DR: In this paper, a trench is cut into an epitaxial layer to provide access to a differently doped buried layer, and the underlying region of the buried layer is etched away to form a cavity under the active area.
Patent
Method for forming a semiconductor device with trench isolation structure
TL;DR: In this article, a plurality of circuit elements such as transistors are isolated from one another by trenches formed in field isolation regions of a semiconductor substrate, each trench should be filled with appropriate materials to maintain the flatness of the surface of the substrate.
Patent
Multilayer trench isolation process and structure
TL;DR: In this article, a cap layer of silicon oxy-nitride is added to insure filling of any trench intersections, where oxygen and nitrogen-rich material is expressed in atomic fraction and x+y+z=1.
PatentDOI
Method for manufacturing semiconductor device utilizing two-step etch and selective oxidation to form isolation regions
TL;DR: In this paper, the authors proposed a method for manufacturing a semiconductor device of high reliability, high performance and high integration with high yield, which has the steps of forming at least one groove in a semiconducting substrate, forming a non-single-crystalline semiconductor film to cover an entire surface of the semiconductor substrate including an inner surface of a groove, selectively etching the non- single-crystaline semiconductonductor film so as to leave the nonsingle-polysilicon semiconductor material on at least a side wall of the groove, and forming
Patent
Method for forming oxide-capped trench isolation
TL;DR: In this paper, a method of forming trench isolation is disclosed, in which a trench is etched, either through field oxide or not, into the substrate, using an oxide hard mask, and a polysilicon layer is deposited into the trench and over the wafer, and is etched to clear from the surface, and overetched so that a recess is formed within the trench.