Journal ArticleDOI
The Oxidation of Shaped Silicon Surfaces
R. B. Marcus,T. T. Sheng +1 more
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TLDR
In this article, a 30% decrease in oxide thickness at silicon step edges following 900° and 950°C wet oxidation is attributed to the effect of locally compressive intrinsic stress within the oxide on the solubility of oxygen.Abstract:
Nonplanar silicon surfaces were prepared and oxidized at 900°–1100°C and the oxide morphology was studied by transmission electron microscopy of thin sections. A 30% decrease in oxide thickness at silicon step edges following 900° and 950°C wet oxidation is attributed to the effect of locally compressive intrinsic stress within the oxide on the solubility of oxygen. Oxidation inhibition becomes less at higher temperatures due to the relief of stress (during growth) by viscous flow of the oxide.read more
Citations
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Journal ArticleDOI
Two-dimensional thermal oxidation of silicon. II. Modeling stress effects in wet oxides
TL;DR: In this paper, the authors proposed a simplified mathematical formulation made possible by the symmetry in cylindrical structures, and compared with experimental data, possible applications, and limitations of the model are also discussed.
Patent
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Journal ArticleDOI
Formation of silicon tips with <1 nm radius
R. B. Marcus,T. S. Ravi,T. J. Gmitter,Ken K. Chin,D. Liu,W.J. Orvis,D.R. Ciarlo,Charles E. Hunt,J.T. Trujillo +8 more
TL;DR: In this paper, a method has been found for preparing uniform silicon tips with a radius of curvature less than 1 nm, formed by oxidation of 5μm-high silicon cones through exploitation of a known oxidation inhibition of silicon at regions of high curvature.
Journal ArticleDOI
Two-dimensional thermal oxidation of silicon—I. Experiments
TL;DR: In this article, the authors introduced a unique experimental approach in which extensive data were obtained concerning the oxidation of cylindrical silicon structures of controlled radii of curvature, and quantitatively demonstrated that the oxidization of curved silicon surfaces is retarded at low temperatures and sharp curvatures, and the retardation is more severe on concave than convex structures.
References
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Book
Physics and technology of semiconductor devices
TL;DR: The Planar Technology of Semiconductor Surfaces is described in this article, where it is shown that the planar planar technology can be used to model the surface effects on p-n junction transistors.