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Proceedings ArticleDOI

Verification of temporal properties in automotive embedded software

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TLDR
A SystemC model from the original C program is derived in order to integrate directly with the SystemC temporal checker and performed a case study on an embedded software from automotive industry which is responsible for controlling read and write requests to a non-volatile memory.
Abstract
The amount of software in embedded systems has increased significantly over the last years and, therefore, the verification of embedded software is of fundamental importance. One of the main problems in embedded software is to verify variables and functions based on temporal properties. Formal property verification using model checker often suffers from the state space explosion problem when a large software design is considered. In this paper, we propose two new approaches to integrate assertions in the verification of embedded software using simulation-based verification. Firstly, we extended a SystemC hardware temporal checker with interfaces in order to monitor the embedded software variables and functions that are stored in a microprocessor memory model. Secondly, we derived a SystemC model from the original C program in order to integrate directly with the SystemC temporal checker. We performed a case study on an embedded software from automotive industry which is responsible for controlling read and write requests to a non-volatile memory.

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Citations
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Proceedings ArticleDOI

Semiformal Verification of Embedded Software in Medical Devices Considering Stringent Hardware Constraints

TL;DR: A semiformal verification approach that combines dynamic and static verification to stress and cover exhaustively the state space of the system is proposed that improves the coverage and reduces substantially the verification time.
Journal ArticleDOI

On the integration of model-driven design and dynamic assertion-based verification for embedded software

TL;DR: This work presents a suitable combination of MDD and dynamic ABV as an effective solution for ESW design and verification and develops a suite of off-the-shelf tools for supporting this integrated approach.
Patent

Methods and systems for property assertion in circuit simulation

TL;DR: In this article, a set of verification rules for a design, wherein the verification rules use a PSL or SVA syntax in a SPICE netlist to describ a property of the circuit design, are discussed.
Proceedings ArticleDOI

Semiformal verification of temporal properties in automotive hardware dependent software

TL;DR: SofTPaDS shows to be more efficient than the software model checkers in order to trace deep state spaces and improves the state coverage relative to a simulation-based verification tool.
Proceedings ArticleDOI

An evaluation of free/open source static analysis tools applied to embedded software

TL;DR: Ten different free/open source tools that perform static software analysis and their use in embedded software are surveyed and Experimental results show that most of them are not ready to be applied to embedded systems.
References
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Book

System Design with SystemC

TL;DR: System Design and SystemC provides a comprehensive introduction to the powerful modeling capabilities of the SystemC language, and also provides a large and valuable set of system level modeling examples and techniques.

Bounded Model Checking.

Armin Biere
TL;DR: This article surveys a technique called Bounded Model Checking (BMC), which uses a propositional SAT solver rather than BDD manipulation techniques, and is widely perceived as a complementary technique to BDD-based model checking.
Book ChapterDOI

Software verification with BLAST

TL;DR: Blast implements an abstract-model check-refine loop to check for reachability of a specified label in the program, and short-circuits the loop from abstraction to verification to refinement, integrating the three steps tightly through “lazy abstraction”.
Proceedings ArticleDOI

Model checking C programs using F-Soft

TL;DR: This paper provides a brief tutorial on model checking of C programs, and provides illustrative details of a verification platform called F-Soft, which provides a range of abstractions for modeling software, and uses customized SAT-based and BDD-based model checking techniques targeted for software.
Book ChapterDOI

The Blast Query Language for Software Verification

TL;DR: This paper presents the Blast specification language, a two-level specification language used to break down a verification task into several independent calls of the model-checking engine and provides a means for structuring and maintaining specifications.
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