scispace - formally typeset
Patent

Vertical MOSFET with reduced turn-on resistance

Reads0
Chats0
TLDR
In this article, a vertical MOSFET structure with a drain consisting of a high conductivity region and a low conductivity area is proposed to minimize the device turn-on resistance without degrading the device breakdown voltage.
Abstract
A vertical MOSFET structure which includes a drain which comprises a high conductivity region and a low conductivity region. The high conductivity drain region is contoured so as to minimize the device turn-on resistance without degrading the device breakdown voltage.

read more

Citations
More filters
Patent

Method for increasing the performance of trenched devices and the resulting structure

TL;DR: In this article, a trenched DMOS transistor is proposed to achieve higher breakdown voltages by increasing the dopant concentration in the epitaxial layer surrounding the bottom of the trench.
Patent

High-voltage semiconductor component

TL;DR: In this article, a block pn junction of a second conductivity type and a drain zone of the first one is shown to be variably so doped that near the first surface doping atoms of the second type predominate.
Patent

Vertical replacement-gate junction field-effect transistor

TL;DR: In this article, an integrated circuit structure includes a semiconductor area with a major surface formed along a plane and a first source/drain doped region formed in the surface.
Patent

Method of making mosfet by multiple implantations followed by a diffusion step

TL;DR: In this paper, a short channel metal oxide semiconductor transistor device is processed without undesirable short channel effects, such as VT falloff and with a reasonable source-drain operating voltage support.
Patent

CMOS vertical replacement gate (VRG) transistors

TL;DR: An architecture and process for forming CMOS vertical replacement gate metal oxide semiconductor field effect transistors is disclosed in this article. But it is not shown how to construct these transistors in an integrated circuit.
References
More filters
Patent

Power field effect transistors

TL;DR: In this paper, a power metaloxide-semiconductor field effect transistor (MOSFET) with high switching speed capabilities is shown, which is facilitated by a narrow channel length defined by the difference in lateral diffusion junctions of the P substrate and N source diffusions.
Patent

Field effect transistor with reduced series resistance

TL;DR: In this article, a field effect transistor with an additional highly doped source region contiguous to the source region and protruding into the channel having a shape approximately conforming to the shape of the depletion layer was proposed to reduce the series resistance from the source to the pinch-off point.
Patent

Field effect transistor with a short channel length

TL;DR: In this paper, a field effect transistor with a MIS gate arrangement having a source and drain formed in a semiconductor body and including an electrically conductive region additionally provided which lies beneath the source zone and which has a conductivity opposite to and/or electrical conductivity which is higher than the semiconducting body which surrounds the zone is presented.
Patent

Method of making a high current Schottky barrier device

TL;DR: In this article, a heavily doped N type conductivity substrate has a lightly doped P-type conductivity epitaxial layer with a centrally located buried layer diffused therein and a second lightly D-type semiconductive layer grown on the first layer.
Related Papers (5)