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Showing papers on "Breakdown voltage published in 1984"


Patent
David James Coe1
04 Dec 1984
TL;DR: In this article, a depletion layer formed throughout a portion in at least a high voltage mode of operation of the device, such as, by reverse biasing a rectifying junction, was introduced.
Abstract: A field effect transistor, a bipolar transistor, a PIN diode, a Schottky rectifier or other high voltage semiconductor device comprise a semiconductor body having a depletion layer formed throughout a portion in at least a high voltage mode of operation of the device, such as, by reverse biasing a rectifying junction. The known use of a single high-resistivity body portion of one conductivity type to carry both the high voltage and to conduct current results in a series resistivity increasing approximately in proportion with the square of the breakdown voltage. This square-law relationship is avoided by the present invention in which a depleted body portion comprising an interleaved structure of first and second regions of alternating conductivity types carries the high voltage which occurs across the depleted body portion. The thickness and doping concentration of each of these first and second regions are such that when depleted the space charge per unit area formed in each of these regions is balanced at least to the extent that an electric field resulting from any imbalance is less than the critical field strength at which avalanche breakdown would occur in the body portion. The first regions in at least one mode of operation of the device provide electrically parallel current paths extending through the body portion.

437 citations


Journal ArticleDOI
TL;DR: In this article, the effects of thermal annealing on the charge-to-breakdown of SiO 2 films were studied and it was determined that electrical breakdown is not caused by the widely-cited accumulation of trapped electrons.
Abstract: Electrical breakdown of thin (32-nm) SiO 2 films subjected to constant-current stressing is studied. By studying the effects of reversing the polarity of the constant-current bias and the effects of thermal annealing on the charge-to-breakdown it is determined that electrical breakdown of SiO 2 is not caused by the widely-cited accumulation of trapped electrons. Rather it is caused by the buildup of positive charges near the cathode at localized areas. The positive charges are not mobile ions but exhibit many characteristics of trapped holes. We conclude that electrical breakdown in SiO 2 is caused by the accumulation of holes, generated by impact ionization in the oxide.

87 citations


Journal ArticleDOI
TL;DR: In this paper, the first fabrication of metal-epitaxial insulator-semiconductor field effect transistors by molecular beam epitaxial growth of CaF2 on Si is reported.
Abstract: Fabrication of metal‐epitaxial insulator‐semiconductor field‐effect transistors by molecular beam epitaxial growth of CaF2 on Si is reported for the first time. These devices have a room‐temperature electron mobility of 300 cm2/Vs and a threshold voltage of 0.5 V. The breakdown voltage of the films ranges from ≳105 to ≳106 V/cm in different regions of the film. These devices will be important for the characterization and improvement of the interface transport properties of the CaF2/Si system.

78 citations


Patent
09 May 1984
TL;DR: In this article, a reactive ion etching method utilizing high frequency voltage was proposed, where cathode drop voltage developed in the vicinity of an electrode disposed for impressing a high frequency power is gradually reduced immediately before stopping the impression of high frequency powers at the end of ion etch process, thereby reducing the voltage impressed on an insulation layer within a semiconductor wafer below the breakdown voltage of the insulation layer.
Abstract: A reactive ion etching method utilizing high frequency voltage wherein cathode drop voltage developed in the vicinity of an electrode disposed for impressing a high frequency power is gradually reduced immediately before stopping the impression of high frequency power at the end of ion etching process, thereby reducing the voltage impressed on an insulation layer within a semiconductor wafer below the breakdown voltage of the insulation layer.

73 citations


Journal ArticleDOI
TL;DR: In this article, a gated Ge avalanche photodiode pulse biased above breakdown was used for the detection of single photons at a wavelength of 1.3 µm using an ultra-sensitive photodrome.
Abstract: We have done experiments on the detection of single photons at a wavelength of 1.3 μm using a gated Ge avalanche photodiode pulse biased above breakdown. The influence of traps on the breakdown voltage was measured and the possibility of using such an ultrasensitive photodiode as a quantum limited detector for optical communications is discussed.

66 citations


Patent
David James Coe1
13 Jan 1984
TL;DR: In this paper, it was shown that at least one annular region (11,12,... ) extends around an active device region (10) and is located within the spread of a depletion layer (25) from a reverse-biased p-n junction (20) formed by the device region to increase the breakdown voltage of the junction.
Abstract: At least one annular region (11,12, . . . ) extends around an active device region (10) and is located within the spread of a depletion layer (25) from a reverse-biased p-n junction (20) formed by the device region (10) to increase the breakdown voltage of the junction (20). The device region (10) and/or at least one inner annular region (11,12, . . . ) includes at least one shallower portion (10b,11b, . . . ) which extends laterally outwards from a deep portion (10a,11a,12a, . . . ) and faces the surrounding annular region to change the spacing and depth relationship of these regions. This permits high punch-through voltages to be achieved between the regions (10,11,12, . . . ) while reducing peak fields at the bottom outer corners of the regions (10,11,12, . . . ). Inwardly-extending shallow portions (11c,12c, . . . ) may also be included. The shallow portions (10b,11b,11c,12c . . . ) may extend around the whole of a perimeter of the region or be localized where higher electrostatic fields may occur around the perimeter.

60 citations


Patent
08 Jun 1984
TL;DR: A gas-insulated electric device comprising an electric conductor disposed in a sealed vessel filled with an insulating gas with the conductor being supported by a solid insulating member is disclosed in this article.
Abstract: OF THE DISCLOSURE A gas-insulated electric device comprising an electric conductor disposed in a sealed vessel filled with an insulating gas with the conductor being supported by a solid insulating mem-ber is disclosed. The insulating gas is a mixture of a nitrilic type fluorocarbon compound and SF6. The dielectric strength is increased, and accordingly, the size of the device can be decreased. Further the breakdown voltage of the device is increased using such a mixture by the synergistic effect of the components.

55 citations


Proceedings Article
24 Jul 1984
TL;DR: In this paper, the pre-breakdown process of n-hexane, toluene, and Marcol 70 in pure state and with selected impurities was studied using a point-plane geometry.
Abstract: The prebreakdown processes have been recorded in n-hexane, toluene, and Marcol 70, both in a pure state and with selected impurities. The study was carried out using a point-plane geometry. A low ionization potential additive had only a small effect on the breakdown voltage or the streamer propagation speed but did significantly alter the shape of the prebreakdown streamer when the needle was the anode. For a cathode needle, chemical impurities affected the breakdown voltage.

54 citations


Patent
11 Jun 1984
TL;DR: In this article, a transient surge suppression system utilizes a negative resistance voltage breakdown device such as a gas discharge tube or a semiconductor device in series with a nonlinear resistance element, preferably a non-linear resistor element, such as varistor or Zener diode, to limit the amplitude of voltage transients applied to electrical equipment being protected.
Abstract: A transient surge suppression system utilizes a negative resistance voltage breakdown device such as a gas discharge tube or a semiconductor device such as a SIDAC in series with a resistance element, preferably a non-linear resistance element, such as a varistor or Zener diode, to limit the amplitude of voltage transients applied to electrical equipment being protected. The breakdown device breaks down when a sufficiently high amplitude voltage transient is applied thereto, and the resistive element serves to protect the breakdown device from damage by excessive follow-on current. If a non-linear resistance device is used as the resistance element, the voltage across the combination is reduced at high currents. Several units may be cascaded to achieve sequential breakdown of multiple devices to thereby share the surge current among several devices and to reduce the dynamic impedance of the circuit and to multiply power dissipation capacity of the transient voltage surge suppression system.

48 citations


Proceedings ArticleDOI
01 Jan 1984
TL;DR: In this article, an isolation-merged vertical capacitance (IVEC) cell is described with emphasis on its scalability, simulated device characteristics and experimentally obtained capacitor oxide breakdown voltage.
Abstract: An isolation-merged vertical capacitor (IVEC) cell is described with emphasis on its scalability, simulated device characteristics and experimentally obtained capacitor oxide breakdown voltage. The IVEC cell size will be reduced to around 5 µm2by using the 0.5 µm rule process and trench depth of 2.2 µm. Capacitor oxide breakdown voltage is nearly the same with the conventional trench capacitor.

45 citations


Journal ArticleDOI
TL;DR: In this article, GaAs MESFETs with highly doped channels up to 5 \times 10^{18} cm-3 and with both micrometer and submicrometer gates were fabricated and evaluated.
Abstract: GaAs MESFET's with highly doped channels up to 5 \times 10^{18} cm-3and with both micrometer and submicrometer gates were fabricated and evaluated. FET's with 1.2-µm gates show an extrinsic transconductance of more than 250 mS/mm, cutoff frequencies around 20 GHz, and a noise figure of 2 dB at 8 GHz with 9-dB associated gain. Breakdown voltage is higher than 6 V. FET's with 1.2- and 0.4-µm gates were simultaneously fabricated on the same wafer to investigate short-channel effects. The short-channel devices show a good saturation behavior and no shift in the threshold voltage compared to the long-channel devices thus demonstrating a pronounced alleviation of short-channel effects as experienced for 1 \times 10^{17} cm-3doping levels. The influence of doping concentration on the performance of devices with micrometer and submicrometer gates upon doping concentration is investigated by detailed computer simulations. Good agreement between theoretical and experimental results is obtained. From these results improved technological approaches are pointed out.

Patent
09 Jul 1984
TL;DR: In this paper, a transient voltage surge suppressor for an AC powerline comprises two semiconductor voltage limiting devices before a low pass LC filter and a third voltage limiting device after the filter.
Abstract: A transient voltage surge suppressor for an AC powerline comprises two semiconductor voltage limiting devices before a low pass LC filter and a third semiconductor voltage limiting device after the filter. The suppressor can be plugged into a 120 volt receptacle for protection of sensitive electronic equipment.

Patent
Kenji Iimura1, Yoichi Nakashima1
11 Apr 1984
TL;DR: In this paper, the impurity concentration in the surface of a P-layer equal to or less than 8×1018 atoms/cc, putting the thickness of an N-layer in a range from 2 to 6 μm.
Abstract: A high-speed diode with a PNN+ structure has a breakdown voltage of about 200 V, a forward voltage drop of 0.9 V or less, a reverse recovery time of 50 nsec or less, and a soft recovery characteristic, by making the impurity concentration in the surface of a P-layer equal to or less than 8×1018 atoms/cc, putting the thickness of the P-layer in a range from 2 to 6 μm, putting the resistivity of an N-layer in a range from 5 to 12Ω-cm, putting the thickness of the N-layer in a range from 19 to 25 μm, and putting the carrier lifetime in the N-layer in a range from 20 to 40 nsec.

Journal ArticleDOI
TL;DR: In this article, In0.53Ga0.47As photodiodes with a breakdown voltage of ∼50 V were passivated with polyimide and were found to consistently have leakage currents of ∼10 nA at a 20-V bias.
Abstract: Techniques for passivating In0.53Ga0.47As, InGaAsP, InP, and InGaAsP/InP p‐n junction structures with polyimide have been developed. Low stable leakage current is maintained for prolonged bias, even after exposure to high temperatures (∼320 °C) during packaging. 150‐μm‐diam In0.53Ga0.47As photodiodes with a breakdown voltage of ∼50 V were passivated with polyimide and were found to consistently have leakage currents of ∼10 nA at a 20‐V bias.Details of the passivation process are given.

Journal ArticleDOI
Masayuki Hikita, Seiji Tajima, Ippei Kanno, Goro Sawa1, Masayuki Ieda 
TL;DR: In this paper, the breakdown mechanism was discussed on the basis of results obtained for polythylene (PE) and polymide (PI) by applying dc ramp voltage, and it was shown that at 90°C the pre-breakdown current of PI sharply increased from about 1 msec before breakdown to about 100 ns before breakdown.
Abstract: A technique of measuring current prior to breakdown was introduced. The breakdown mechanism was discussed on the basis of results obtained for polythylene (PE) and polymide (PI) by applying dc ramp voltage. At 90°C the pre-breakdown current of PI sharply increased from about 1 msec before breakdown. For PE, the sharp current increase could not be detected till about 100 ns before breakdown, which is the resolution limit of the measuring system. If this sharp increase is due to the temperature rise of the sample, thermal breakdown may be dominant in the case of PI but not of PE.

Patent
30 Nov 1984
TL;DR: In this paper, an improved lateral polysilicon diode in an integrated circuit structure is disclosed, characterized by low reverse current leakage, a breakdown voltage of at least 5 volts, and low series resistance permitting high current flow before being limited by saturation.
Abstract: An improved lateral polysilicon diode in an integrated circuit structure is disclosed. The diode is characterized by low reverse current leakage, a breakdown voltage of at least 5 volts, and low series resistance permitting high current flow before being limited by saturation. The polysilicon diode comprises a polysilicon substrate having a first zone sufficiently doped to provide a first semiconductor type and a second zone sufficiently doped to provide a second semiconductor type whereby the junction between the two zones forms a diode. The lateral edges of the diode are treated to remove defects to thereby inhibit current leakage around the edges of the lateral diode to lower the reverse current leakage of the diode.

Patent
Susumu Iesaka1
04 Jun 1984
TL;DR: In this paper, a guard-ring-equipped Schottky barrier diode, which can have shortened reverse recovery time and increased withstand voltage, has been proposed, where an insulative film (23) with an opening over part of the guard ring (25) is formed over the region between the edge of the barrier layer (27) and the guard circle (25).
Abstract: A guard-ring-equipped Schottky barrier diode, which can have shortened reverse recovery time and increased withstand voltage, has a Schottky barrier layer (27) formed on a semiconductor substrate (20) of a first conductivity type and a guard ring (25), which has a second conductivity type, formed on surface of the substrate (20) isolated from but surrounding the periphery of the barrier layer (27). An insulative film (23) with an opening over part of the guard ring (25) is formed over the region between the edge of the Schottky barrier layer (27) and the guard ring (25). A high-resistance layer (26) is formed on this opening and is connected with the Schottky barrier layer (27) by a metal electrode (28). The size of the area between the guard ring (25) and the end ofthe barrier layer (27) is less than the sum of the widths of the depletion layers of the guard ring (25) and the barrier layer (27) at the time when the lower voltage of either the barrier layer (27) breakdown voltage or the guard ring (25) breakdown voltage is applied.

Journal ArticleDOI
TL;DR: In this paper, a new power MOSFET structure with a self-aligned terraced gate was proposed, which reduced the parasitic gate capacitances, resulting in improved high-frequency performance.
Abstract: A new power MOSFET structure with a Self-aligned Terraced Gate (STGMOSFET) is demonstrated. The unique gate structure of the STGMOSFET reduces the parasitic gate capacitances, resulting in improved high-frequency performance. The STGMOSFET structure was used to design a 3.5 mm × 3.5 mm transistor. This chip had an on-resistance of 2.3 Ω and a 500-V source-drain breakdown voltage. It exhibited excellent high-frequency performance with a cut-off frequency of 100 MHz, and rise and fall times of 5 and 20 nS, respectively.

Journal ArticleDOI
TL;DR: In this article, the combined effect of the spacing between adjacent drain junctions, epilayer thickness, and resistivity in VDMOS transistors on both its breakdown voltage and R-on-A product is investigated.
Abstract: The combined effect of the spacing between adjacent drain junctions, epilayer thickness, and resistivity in VDMOS transistors on both its breakdown voltage and R_{on} \cdot A product is investigated. It is shown that an increase in the breakdown voltage results as the junctions spacing is reduced. That gives a significant difference in the R_{on} \cdot A product when compared with results where this effect is ignored. A design optimization study is carried out to determine the parameters of a VDMOS transistor at 1000-V breakdown.

Proceedings ArticleDOI
01 Apr 1984
TL;DR: In this article, a new type of failure mode of the gate dielectric breakdown in an MOS transistor induced by the snapback phenomena is reported, which results in a gate-to-drain short, and was found to require a minimum critical current, Idcrit, after the transistor goes in the Snapback.
Abstract: A new type of failure mode of the gate dielectric breakdown in an MOS transistor induced by the snapback phenomena is reported. Unlike a typical gate oxide breakdown which is caused by a voltage stress on the gate, this failure mode is caused by a source-drain bipolar current resulting from the snapback action. This failure mode results in a gate-to-drain short, and was found to require a minimum critical current, Idcrit, after the transistor goes in the snapback. The failure node is exhibited in the input protection structures used in an MOS circuit. The incidence of the failure mode increased with increasing grading of the source-drain junction. (i.e., the Idcrit decreased as the junction grading increased). The ESD breakdown of the inputs are also shown to be a direct result of this failure mode

Journal ArticleDOI
TL;DR: In this article, the effect of varying the π-region width and doping concentration on the performance of planar silicon p-π-ν diode structures was investigated by computer-aided numerical similation.
Abstract: Design considerations for optimizing the high-voltage capability of a planar silicon p-π-ν diode structure are studied by computer-aided numerical similation. The effect of varying the π-region width and doping concentration are investigated. An optimum field plate design is determined. The reduction of breakdown voltage due to Q ss is calculated. Accurate avalanche breakdown prediction is accomplished by solving the Poisson charge and electron and hole current continuity equations. The values found are a few percent smaller than those obtained by only solving the Poisson equation and then calculating the ionization integral. Discrepancies with previously reported avalanche breakdown calculations and measured data are discussed.

Journal ArticleDOI
TL;DR: In this article, a metal-insulator-semiconductor field effect transistor using an undoped AlGaAs layer as an insulator has been fabricated and RF tested, which achieved an output power of 630 mW with 7dB gain and 37 percent power added efficiency at 10 GHz.
Abstract: A metal-insulator-semiconductor field-effect transistor using an undoped AlGaAs layer as an insulator has been fabricated and RF tested. Due to the higher breakdown field of the wide-band-gap AlGaAs, the gate breakdown voltage has been greatly improved as compared with a conventional GaAs MESFET. The prebreakdown gate leakage current of this new device structure is also much lower than that of the MESFET. The presence of the gate insulator also reduces the gate capacitance. All these factors result in a GaAs power FET structure with potentials for high power, efficiency, and frequency of operation. An unoptimized 750-µm gate-width device achieved an output power of 630 mW with 7-dB gain and 37-percent power-added efficiency at 10 GHz. At reduced output power levels, power-added efficiency as high as 46-percent was obtained at X-band.

Journal ArticleDOI
TL;DR: In this paper, a planar InP/GaInAsP/GAInAs buried-structure avalanche photodiode, which has a buried active region and an n−−InP guardring region, has been developed.
Abstract: A new planar InP/GaInAsP/GaInAs buried‐structure avalanche photodiode, which has a buried active region and an n−‐InP guardring region, has been developed A useful guardring effect and a uniform multiplication are obtained in the multiplication range of up to 30 The diode shows a dark current of 10 nA at a bias of 90% of the breakdown voltage, a maximum avalanche gain of 50 under 13‐μm light irradiation, and a gain‐bandwidth product of about 16 GHz

Journal ArticleDOI
M. Honda1, H. Aoyagi1, M. Koya1, N. Kobayashi1, M. Tamura1 
TL;DR: In this paper, experiments were conducted to determine the cause of epoxy mold insulation breakdown under sustained applied AC voltage, and it was shown that the deterioration of this void-free insulation is primarily caused by an electric field concentration due to micro-protrusions on the embedded electrode surface and a small partial discharge which occurred at minute debonded portions around the micropro trusions.
Abstract: This paper describes experiments conducted to determine the cause of epoxy mold insulation breakdown under sustained applied AC voltage. It can be readily understood that epoxy mold insulation, widely used as solid insulation in gas-insulated switchgear, is subject to breakdown under sustained applied voltage when the mold insulation contains large voids. However, epoxy mold insulation which is practically void-free also deteriorates under sustained applied voltage. It has been clarified by conducting experiments using various embedded electrode materials that the deterioration of this void-free epoxy mold insulation is primarily caused by an electric field concentration due to micro-protrusions on the embedded electrode surface and a small partial discharge which occurred at minute debonded portions around the micro-protrusions.

Patent
18 Jun 1984
TL;DR: In this article, the surface breakdown voltage of a surface breakdown type MOS transistor, which is a principal member of a protection device, is reduced by increasing the concentration of a region in which the MOS transistors are disposed, by reducing the depth of the region, and so forth.
Abstract: This invention relates to a protection device of a semiconductor device. The present invention can prevent the drop of a gate breakdown voltage due to miniaturization of a device without impeding the high speed performance of the circuit attached thereto. The invention improves the voltage that can be applied to the input terminal of the device by reducing the surface breakdown voltage of a surface breakdown type MOS transistor, which is a principal member of a protection device, and reducing the resistance after the breakdown. This can be accomplished, for example, by increasing the concentration of a region in which the MOS transistor is disposed, by reducing the depth of the region, and so forth.

Journal ArticleDOI
TL;DR: In this article, it was shown that rapid lamp heating results in much lesser failure involving gate oxide breakdown voltage compared to furnace heating, and also exhibit excellent device characteristics, such as uniform highly conductive layers comparable to furnace-heated films.
Abstract: Ti-Si thin films, co-sputter deposited from a titanium and a poly-Si target, have been rapidly lamp heated within 10 s to produce uniform highly conductive layers comparable to furnace-heated films. MOS devices are fabricated using this Ti-Si rapid lamp heating. It is shown that rapid lamp heating results in much lesser failure involving gate oxide breakdown voltage compared to furnace heating. MOSFET's also exhibit excellent device characteristics.

Journal ArticleDOI
TL;DR: In this article, a pulsed ArF laser is used to photochemically deposit thin films of silicon dioxide on silicon substrates, and as the substrate temperature increases during film deposition, the etch rate, dielectric constant, flatband voltage shift, and hydrogen bonding of the SiO2 film decreased while the refractive index, resistivity, and breakdown voltage increased.
Abstract: A pulsed ArF laser is used to photochemically deposit thin films of silicon dioxide on silicon substrates. As the substrate temperature was increased during film deposition, the etch rate, dielectric constant, flatband voltage shift, and hydrogen bonding of the SiO2 film decreased while the refractive index, resistivity, and breakdown voltage increased. The etch rate and infrared absorbance of bonded hydrogen incorporated in the SiO2 film also decreased when surface photons impinged on the growing films or when a post‐deposition anneal was performed.

Patent
13 Mar 1984
TL;DR: In this paper, a vertical type MOSFET with high degree of integration and low ON resistance is presented, where the drain region has low resistivity part between well regions and the high resistivity parts with which the bottoms of the well regions are in contact.
Abstract: A vertical type MOSFET having a high degree of integration and a low ON resistance is shown. This device is formed so that the drain region has low resistivity part between well regions and the high resistivity part with which the bottoms of the well regions are in contact. Thereby provided is the MOSFET which has low ON resistance and a high breakdown voltage in spite of its high degree integration.

Journal ArticleDOI
TL;DR: In this paper, the two-dimensional Poisson equation is solved using the finite difference method and the questions of optimal bevelling and the influence of surface charges on the blocking capability are extensively studied.
Abstract: The breakdown voltage of p+-n-n+devices is investigated. The two-dimensional Poisson equation is solved using the finite difference method. The questions of optimal bevelling and the influence of surface charges on the blocking capability are extensively studied. Furthermore, it is investigated to replace a small bevel angle at the n+- region by a mesa-like structure.

Journal ArticleDOI
TL;DR: In this article, the authors measured the direct breakdown voltage for a needle-plane electrode system in silicone oil, with polymer films of polypropylene, polyethylene terephthalate, fluorinated ethylene propylene, and polyamide on the plane.
Abstract: The direct breakdown voltage was measured for a needle-plane electrode system in silicone oil, with polymer films of polypropylene, polyethylene terephthalate, fluorinated ethylene propylene, and polyamide on the plane. In the silicone oil alone, the breakdown voltage increased with increasing gap distance for both polarities, the values being highest with the needle negative. In the silicone oil/polymer film composite, with the needle positive, the breakdown voltage was higher than for the oil alone. Although breakdown initiated at the needle tip, the polymer film acted as a barrier to increase the system breakdown voltage. However, with the needle negative the breakdown voltages of all the composite systems, with exception of the polyamide film, were lower than for the oil alone. This is attributed to negative ions deposited on the film which create a high field and initiate breakdown in the film.