Showing papers on "Depletion region published in 1971"

Electrical Properties of Semiconductor Photodiodes with Semitransparent Films

Abstract: High speed photodiodes with semitransparent film-semiconductor junctions, which behave as Schottky barriers, are designed and prepared. The optimized width of the depletion layer of the photodiode is calculated for the selected cut-off frequency. The relations between transmittance and sheet resistivity are studied with some films of semiconducting compounds, which affect the gain and response time of photodiodes. The photodiodes, fabricated by the deposition of the semitransparent films of CdS or CU2Se on Si, have high frequency response and the cut-off frequency of Cu2Se-n.Si photodiodes is higher than 4 GHz.

Schottky barriers on p-type silicon

Abstract: Measurements have been made of the electrical characteristics of Schottky barriers made by evaporating films of various metals (Al, Pb, Ni, Au, Ag, Cu) onto p-type silicon. The barriers were generally lower than on n-type silicon, and in the case of Au the barrier was so low as to provide an effectively ohmic contact at room temperature. The truly exponential portion of the forward I–V characteristic was restricted to a comparatively small voltage range. Within this range ‘n’ values of about 1.10 were obtained. The reverse characteristics could be explained in terms of generation in the depletion region. The variation of barrier height with metal work-function indicates that the surface-state parameters (density of states and position of neutral level) are essentially the same for p-type as for n-type silicon. This is confirmed by the fact that, for a given metal, the sum of the barrier heights on n-type and p-type silicon is approximately equal to the band-gap.

Thermal emission and capture of electrons at sulfur centers in silicon

Abstract: The electron thermal emission and capture rates and the electron impact ionization rate of trapped electrons at the sulfur donor centers in the depletion region of reverse biased silicon p-n junctions have been measured by the dark capacitance and current transient methods. Least square fits of the low field data give the following electron thermal emission rates: en0t = 1.64 × 1010(T/300°K)2exp [−276/kT] sec for the neutral center and en−1t = 1.03 × 1012 (T/300°K)2 exp [−528/kT] sec for the singly ionized center where kT is in meV. The thermal activation energies are then 276 and 528 meV respectively. The hole emission rates are much smaller and not determined. The electric field dependences of the thermal emission rates of electrons are considerably smaller than that predicted by the Poole-Frenkel theory applied to the ground state: en0t increased by 1.5 at 130°K from 0.2 to 1.0 × 105 V/cm and en−1t by 3 at 200°K. Electron capture coefficients are obtained from capacitance transient during steady state electron injection into the junction depletion layer either by transistor emitter or by optical generation at the surface next to the junction. The electron capture rate at the doubly charged center, cn−2t, decreases from 5 × 10−7 cm3/sec at 3 × 104 V/cm to 10−7 cm3/sec at 1.0 × 105 V/cm with essentially no temperature dependence. The electron capture rate at the singly ionized centers, cn−1t, obtained at 82°K was about two orders of magnitude smaller than cn−2t but had essentially the same electric field dependence. The electron impact ionization rate of trapped electrons at the neutral centers and its electric field dependences were also determined at 82°K.

Solid state sensor

Abstract: A sensor for detecting given constituents of an atmosphere employing a solid state device formed by a glass-ceramic element having a depletion layer exposed to the atmosphere in which a given gas or vapor is to be sensed. The glass-ceramic sensor is formed with two terminals on opposite sides of the depletion layer and the terminals are connected into a circuit establishing a potential difference between the terminals across the depletion layer. By forming the glass-ceramic element of a material in which leakage currents between the terminals through the glassceramic sensing element will be produced by the presence of a given material in the atmosphere, sensing results.

Boundary conditions at p-n junctions

Abstract: A discussion is presented of the relationships between carrier densities at a p-n junction and the junction potential. The major purpose of the work is to discuss the relationship between the Fletcher and Misawa boundary conditions. In addition, a discussion is presented of an extension of the normal boundary conditions to account for current flow within the junction space charge region.

Determination of optical ionization cross sections in GaP using charge storage and impurity photovoltaic effect

Abstract: A simple experimental method is presented for determining absolute values of photoionization cross sections by combining steady state and transient measurements of the extrinsic photovoltaic effect. It is shown that, under certain conditions, the short circuit current caused by a two step excitation process via localized impurity levels, is mainly generated in the transition region of the junction. The equationms for the photovoltaic effect reduce then to a simple form and the photoionization cross sections of the impurity levels involved can be expressed in experimental quantities, where a constant factor is also involved, as a function of energy. To determine this factor, the decay of optically excited stored charge carriers was investigated. The concentration of deep impurity levels in the depletion region of the junction together with capacitance measurements was finally calculated from this constant factor. All experiments were performed with zinc and oxygen doped GaP diodes at room temperature. At 1·78 eV the photo ionization cross sections of an impurity level with binding energy 0·9 eV probably caused by oxygen are found to be 1 × 10−16cm2 and 1·5 × 10−16cm2.

Solid state imaging device with fet sensor

Abstract: A solid state imaging device is described. Junction FETs are employed as the sensors in a charge storage mode. In the nonilluminated condition, each FET has its channel blocked by a depletion region formed by pulsing the gate. Under illumination, the depletion region withdraws, opening up the channel. Each imaging FET element is sensed by pulsing its source or drain, following which its gate is pulsed to reblock the channel. Also, an integrated circuit version of the device, the photo-JFETs having annular photo-gate regions and having a common substrate gate, the color response of the device being controlled by bias on the substrate gate.

High performance, low power CMOS memories using silicon-on-sapphire technology

Abstract: Silicon-on-sapphire (SOS) technology allows the fabrication of complex MOS integrated circuits with high speed performance comparable to that of bipolar circuits but at the expense of only microwatts of quiescent power dissipation. The use of a 1 µm thick single crystal silicon films allows virtual elimination of the parasitic capacitance which seriously degrades the performance of bulk silicon MOS circuits. Complementary MOS/SOS integrated circuits fabricated with self-aligned silicon gate technology and 5 µm channel spacings make 2 nanosecond gate delays and 1 picojoule gate power x delay products possible at 5V operation. In addition to high switching speed and low dynamic power, CMOS/SOS circuits with low leakage currents and therefore low quiescent power can be fabricated. The reverse currents of vertical junction SOS diodes are due to electron-hole generation in the depletion layer and have the voltage dependence predicted by the Sah-Noyce-Shockley theory. Lifetimes on the order of 1 ns have been measured; however, the total junction leakage currents are small (50 pa/mil width at 5 V) due to the extremely small junction areas involved.

Analytical Expressions for Electric Field and for Capacitances of Symmetrical and Asymmetrical Abrupt p‐n Junctions

Abstract: Computer calculations carried out for p‐n junctions justify the assumption that, to obtain a good approximation for the electric field and for the capacitance, the quasi‐Fermi potentials may be considered constant in the depletion region. Making use of this property an analytical method for the calculation of the electric field and of the capacitance is worked out. This method yields for asymmetrical junctions simple results for (1) the explanation of the peak in the electric field distribution near the metallurgical junction; (2) the calculation of the critical voltage at which the inversion layer disappears; (3) a new analytical formula for the capacitance and a simple formula for the calculation of the C−2 vs U intercept. The results of the analytical method completely agree with the results of exact computer calculations, and are in contradiction with earlier publications.

Accurate Capacitance Calculations for PN Junctions Containing Traps

Abstract: Accurate numerical calculations for the small‐signal response of PN junctions containing deep‐level carrier traps as a function of frequency and reverse‐bias voltage are reported for the first time. Calculations for Au‐doped Si PN abrupt and diffused junctions compare favorably to published experimental results if the room‐temperature emission rates of Tasch and Sah, which leave the Au center only slightly negatively charged in the depletion region, are used. Inclusion of the electric field dependences of the emission rates improves the agreement between experiment and theory. It is demonstrated that ignoring the trapping of carriers which spill over from the more heavily doped side of an asymmetric junction causes some inaccuracies in the use of results from previously published approximate analyses.

Progress in the fabrication of γ-ray detectors from high purity germanium

Abstract: A planar detector with a depletion layer width of 8mm has been fabricated from high purity germanium. A total system resolution of 2.4 keV at 1.33MeV is obtained with 600 volts bias on this detector. Another detector with a 3mm thick depletion region which was operated at 2000 volts bias yielded a system resolution of 1.65 keV at 1.33 MeV. Thin window detectors have been fabricated by using a glow discharge of BF3 or PF5. This technique has also been used to form ohmic contacts on high purity germanium.

High voltage planar diode structure and method

Abstract: High voltage planar diode structure having a semiconductor body with a planar surface. The body has a region of a first conductivity type extending to the surface and a second region in the body of opposite conductivity type and also extending to the surface and being defined by a dish-shaped P-N junction within said first region and extending to the surface. A layer of insulating material is provided on the surface and has an opening therein exposing the surface in an area overlying the second region. The insulating layer is graduated in thickness so that it becomes progressively thicker in a direction away from the opening in the insulating layer. Metallic means is disposed on the insulating layer and makes contact to said second region through the opening in the insulating layer and forms a field plate which generally overlies the depletion layer which is formed during operation of the diode.

Method and device for storing information and providing an electric readout

Abstract: An information storing method and a storing device using a conductor-insulator-semiconductor (CIS) structure as the storage element is disclosed within. The CIS structure is initially charged to a predetermined voltage, forming a depletion region within the semiconductor beneath the conductor. Minority carriers are controllably generated within the semiconductor in proportional response to an information-bearing signal such as a specific amount of electromagnetic radiation flux. The generated minority carriers move to and are stored at the surface of the semiconductor beneath the conductor due to the electric field existing in the depletion region, thus changing the predetermined voltage. The change in voltage which may be determined is a measure of the number of generated minority carriers and, therefore, is a measure of the integrated electromagnetic radiation flux and constitutes the stored information.

Neutron-Induced Metallic Spike Zones in GaAs

Abstract: The metallic spike model for neutron damage has been shown to account for the observed anomalous infrared absorption in GaAs. In this paper, the electrical properties of semiconductors containing metallic spikes are explored. The metallic zones are shown to act as deep potential wells which trap carriers from the host semiconductor energy bands. The component of mobility associated with carrier scattering from the depletion region surrounding charged spikes is estimated as a function of temperature, including the temperature dependence of the trapped charge. Hall measurement data taken before and after neutron irradiation of n-type GaAs are compared with theory and good agreement is obtained. It is proposed that the high field trapping and slow release of electrons observed in neutronirradiated Gunn diodes is associated with the presence of metallic spikes. Hot electrons in high field domains penetrate the electrostatic barrier and are trapped within the spikes. When the low field condition is restored, excess electrons return to the host semiconductor matrix. The rate of escape of excess electrons is estimated from considerations of the processes of emission over and tunneling through the electrostatic barrier. Measurements of the temperature - dependent decay rates of the excess charge are obtained from neutron-irradiated Gunn diodes. Two decay rates were obtained at each temperature. The shorter decay time shows a temperature dependence consistent with a quantum tunneling mechanism. The longer decay time shows a stronger temperature dependence which is in qualitative agreement with emission of electrons over the barrier.

Turn-off transient behaviour of p- i- n diodes

Abstract: The transient turn off behaviour of a p-i-n diode (or a p+-n-n+ diode under high level injection conditions) is studied. The paper examines in detail the various phases occuring under conventional ‘current switching’ conditions after the end of the constant reverse current phase. The paper is divided into two parts which deal respectively with the slow transient (evacuation of the residual charge in the neutral region) and the following fast transition (evacuation of the ‘left over charge’ in the space charge region and charging of the space charge capacitance). The results presented enable the complete turn off behaviour for various diodes to be predicted with a fair degree of accuracy, as is shown by the experimental results. For the slow transient, both constant carrier velocity and constant mobility conditions are considered with variable current, i.e. the interaction between the external circuit (characterized by a constant reverse voltage and a series resistance) and the diode parameters is taken into account. The voltage at the end of this slow transient is determined and related to diode and circuit parameters. The voltage at which the change over from constant mobility to constant velocity conditions occurs is also determined. For the fast transition, the interaction between the circuit and device parameters is again considered and evaluation of the two times characterizing this fast transition enables the voltage versus time decay to be characterized for any diode and circuit parameters. The conditions necessary for the fast transition to exist are discussed and the optimum condition for the fastest ‘turn off’ is determined, which in turn determines the ultimate limit of a step recovery diode.

Method and system for improved operation of conductor-insulator-semiconductor capacitor memory having increased storage capability

Abstract: A computer memory system employing a planar metal-insulator semiconductor-metal memory capacitor sandwich for selectively storing an array of electric charges in the insulator near the insulator-semiconductor interface in patterns which are representative of binary encoded data The method and system for initially uniformly charging the planar surface of the insulator of a memory capacitor employing p-type semiconductors with positive polarity electric charges, maintaining the positive electric charges at those data bit sites representative of binary ''''I''s'''' and removing positive charges at the binary ''''O'''' data sites to form non-charged areas of diameter D surrounding the binary O data bit sites where D is the equivalent or greater than several electron path diffusion lengths in the semiconductor The positive charges are formed in the insulator layers by bombarding the insulator with an electron beam while maintaining a positive polarity electric field across the memory capacitor At the data bit sites where binary ''''O''s'''' are to be written, a negative polarity field gradient is established across the capacitor while irradiating the selected bit site with the electron beam At each bit site the electron beam is appropriately manipulated by causing it to trace out a circular path of diameter D>d where d is the diameter of the electron beam By spacing the data bit sites apart a distance L>D where the center-to-center spacing distance L is on the order of 20 microns or less, a grid-like lattice of positive electric charges is formed at the insulatorsemiconductor interface which surrounds all of the data bit sites This in turn induces a corresponding interconnected gridlike lattice layer of strongly inverted and highly conducting semiconductor adjacent to the insulator-semiconductor interface This highly conductive inverted semiconductor lattice layer surrounds and interconnects substantially all of the positively charged data bit sites but is separated from the non-charged, binary O bit sites by the distance D/2 which is the equivalent of or > several electron path diffusion lengths in the semiconductor In memory capacitors using n-type semiconductors, the inverse of the charge states in p-type semiconductors is employed During reading, a read-out electron beam selectively probes the data bit sites while a substantially zero voltage or slightly negative bias potential is maintained across the memory capacitor Upon probing a charged binary 1 bit site, electronhole pair carriers are formed and are separated by the electric field of a depletion region induced in semiconductor layer as a consequence of the positive charges The electron current is conductively connected to the highly conducting grid-like inverted lattice layer in the semiconductor and results in a relatively large capacitor charging current to the memory capacitor and a corresponding large output signal Upon impinging into a non-charged binary O data bit site, electron-hole pair carriers produced in the semiconductor by the electron beam recombine within the non-charged region of diameter D prior to reaching the strongly conducting, inverted, grid-like layer Hence, at most only a minimal charging current to the memory capacitor is produced that is readily distinguished from the output current produced at the charged binary 1 data bit sites Enhanced operation is obtained by pretreatment of thE semiconductor through gold doping or annealing in oxygen at the high temperatures in order to enhance recombination rates in the non-charged areas of diameter D Treatment of the metalized face of the insulator that is subjected to the write-read electron beam to produce a metal thickness on the order of 2,000 A units plus or minus 500 A units results in overcoming undesired disturb effects produced by scattering electrons By appropriate readrewrite techniques interaction on adjacent bit sites by scattering electrons can be minimized and long term degradation of the memory over a number of operating cycles prevented

Semiconductor device and circuit arrangement comprising the device

Abstract: Semiconductor device comprising a semiconductor body having a base region of a first conductivity type and an emitter and collector region of a second conductivity type formed side by side in said base region and having like the latter contacts located on a face of said body, to which they are adjacent, characterized in that the device comprises at least one further region of the second conductivity type arranged near the collector and separated therefrom by the semiconductor material of the base region so that at a bias voltage at the collectorbase junction exceeding a given threshold value the depletion zone of said junction attains said further region. The device has three stable states.

P–N junction capacitance†

Abstract: The voltage intercept of the inverse capacitance squared versus voltage curve, for reverse and slight forward bias, has been measured for a variety of alloyed p-n junction diodes made in two ways : normally, so that the substrate was the weakly doped side of the junction ; and abnormally, so that the alloyed aide of the junction was the more weakly doped. Junction capacitance measurements indicate that the intercept varies only with effective weak-side doping concentration. Results are compared with various theoretical expressions from the literature, and also (favourable) to a new approach which considers the ‘ middle ’ of the junction capacitor to be the intrinsic point (zero not mobile charge) rather than the metallurgical junction.

Voltage level sensitive semiconductor arrangement

Abstract: A semiconductor arrangement includes a semiconductor body largely formed of a material of a first conductivity type. Within this material of the first conductivity type a first zone is formed of material of the opposite conductivity type so as to form a PN junction, and appropriate means are provided to apply a voltage across this PN junction so as to create a space charge region which extends for a distance therefrom. Also within the material of the first conductivity type is formed a second zone of material of the opposite conductivity type. The second zone is spaced at such a distance from the PN junction that it will be contacted by the space charge region under appropriate conditions. Appropriate means are provided to give an indication of such a contact of the second zone.

Method and apparatus for analyzing semiconductors

Abstract: A semiconductor wafer is analyzed by applying successive values of reverse-bias voltage V to a diode region to form successive depletion layers of different depth X. Current of frequency f1 is applied to the diode and detected to determine X. Voltage at frequency f2, which is lower than f1, is applied to the diode such as to produce a modulation Delta E2 of the electric field in the depletion layer and a modulation Delta X2 of the depletion layer depth. The voltage input at frequency f2 is controlled to maintain either Delta E2 or Delta X2 constant with changes of X, and the modulation of the f1 voltage at frequency f2 is measured to determine one of these semiconductor parameters at different values of X. In this manner, a profile of semiconductor carrier density N, or its reciprocal 1/N, can be determined. An improved method of determining X is also disclosed.

Neutron Irradiation Effects on Diffused GaAs Laser Diodes

Abstract: The effects of fast neutron damage on diffused GaAs laser diodes have been studied by observing the pre- and post-irradiation current-voltage characteristics and electroluminescence (EL) spectra at several temperatures between 75°K and 300°K. The pre-irradiation diode current at high temperature is dominated by nonradiative space-charge region recombination. The principal emission band at 300°K results from band-to-acceptor recombination in the p-region. A secondary band at 1.28 eV occurs via donor-acceptor pair recombination in the depletion region. At low temperature the dominant diode current flow is by nonradiative tunneling while the principal emission band contains radiative tunneling and band-filling components. Neutron irradiation increases the constant-voltage diode current. The additional current is due to space-charge region recombination (SC) at high temperatures and both SC and tunneling at low temperatures. The room-temperature damage constant is somewhat larger than that found in epitaxial GaAs laser diodes and in silicon p+n diodes. The constant-voltage principal emission band intensity decreases with fluence at a rate such that the resultant damage constant is about half that of the SC current damage constant. Irradiation to a fluence of 1.8 × 1015 n/cm2 (> 10 keV) has no effect on the constant-voltage secondary emission band intensity.

Temperature dependence of space charge capacitance of silicon carbide diodes

Abstract: Capacitance measurements have shown that the charge density in the space charge layer of abrupt p + − n diodes under reverse bias increases with temperature. This observation cannot be explained by means of moderately deep lying donors or acceptors. It can, however, be understood assuming a reasonably large density of traps with an energy level near the centre of the band gap. This assumption is in agreement with the observed small diffusion lengths and minority carrier lifetimes in SiC diodes.

Single-phase charge-coupled semiconductor device

Abstract: A charge-coupled semiconductor device for transmitting information in the form of mobile charges through a depletion layer which comprises an electrode structure on the surface of a semiconductor body that has within it an elongated region containing an impurity gradient. When the body is biased to create a depletion under the region and packets of charges are introduced into the body near the region, the charges will under the influence of the field gradients in the depletion layer be caused to pass through the body, in a known period of time. If due to space charge broadening the charge packets slowly spread out, they may be regrouped by applying a single clock pulse to the electrode structure, which will create sharply defined potential wells under the impurity gradient. The device is particularly useful as both a delay line and as a simple, fast, reliable, memory array.

High power storage diode

Abstract: A high power storage silicon diode of the type having a lightly doped P-type base region or central layer of approximately 100 microns or more in width with a resistivity of about 90 ohm-centimeters and with one heavily doped end layer of N-type material and with another heavily doped end layer of P-type material. The boron in the P-type layer should have an average concentration of at least 2 x 1020 atoms/cm.3 while the phosphorous in the N-type layer should have an average concentration of from 2 - 5 x 1020 atoms/cm.3. Atoms of nickel can be diffused into the space charge region of the diode in small quantities to further extend the storage time without degrading the other useful qualities of the device.

Flash X-ray irradiation of P-N junctions: A method to measure minority carrier lifetimes, diffusion constants and generation constants

Abstract: A method to measure the minority carrier lifetime in semiconductors has been developed utilizing short flashes of X-rays. The advantage with the use of X-rays instead of light is that the generation of charge carriers can be made very homogenous and that the concentration of generated carriers can be varied within a wide range. The experiments were carried out on P + - N silicon diodes and concerned measurements of the decay times for radiation induced currents as function of reverse bias and width of the bulk regions of the diodes. It is shown that by plotting the decay rate as function of the inverse value of the square of the width of the bulk region (according to the theoretical model used) it is possible to obtain both the minority carrier lifetime and the diffusion constant of the N -material. Comparison with other methods confirms the usefulness of the method. By measuring the reverse bias dependence of the width of the depletion region and the corresponding variations in integrated radiation-induced current it was possible to determine the generation constant.

Device for storing information and providing an electric readout

Abstract: An information storing method and a storing device using a conductor-insulator-semiconductor (CIS) structure as the storage element is disclosed within. The CIS structure is initially charged to a predetermined voltage, forming a depletion region within the semiconductor beneath the conductor. Minority carriers are controllably generated within the semiconductor in proportional response to an information-bearing signal such as a specific amount of electromagnetic radiation flux. The generated minority carriers move to and are stored at the surface of the semiconductor beneath the conductor due to the electric field existing in the depletion region, thus changing the predetermined voltage. The change in voltage which may be determined in a measure of the number of generated minority carriers and, therefore, is a measure of the integrated electromagnetic radiation flux and constitutes the stored information.

Base transport factor calculations for transistors with complementary error function and Gaussian base doping profiles

Abstract: By taking account of the carrier mobility degradation at high impurity concentrations, the high-frequency base transport factor of an n-p-n germanium base transistor was computed numerically for different base doping levels. The doping profiles under consideration were Gaussian and complementary error functions. The base doping level adjacent to the emitter was optimized for minimum base transit time. The optimum values are 4×1017atom/ cm3for complementary error function profile and 2×1017atom/cm3for Gaussian profile. The effects of emitter barrier capacitance, base resistance, collector barrier capacitance, and the collector depletion layer on the overall frequency response of a junction transistor are also discussed.

Scanning electron microscopy studies on switching lateral transistors in integrated circuits

Abstract: A switching phenomenon has been observed in certain lateral geometry transistors in silicon integrated circuits and reported. These devices switch between conducting and non-conducting states and a hypothesis has been proposed to explain the mechanism. It has been suggested that the extension of the collector depletion region within the epitaxial layer increases the resistance of r BB ′ causing this effect. This paper describes the use of a scanning electron microscope in the charge collection mode to map the positions of the depletion layers at different bias voltages. Detailed examination of the micrographs has confirmed the proposed theory and has revealed unexpected information about the structure of the transistor.

Improvements relating to semiconductor devices

Abstract: 1,249,812. Semi-conductor devices. FERRANTI Ltd. 13 May, 1970 [29 May, 1969], No. 27138/69. Heading H1K. A transistor 10 formed in a Si wafer of N conductivity material comprises a N conductivity collector 11, a P conductivity base 12 adjacent a major surface 13, and a N conductivity emitter 14 extending to the surface; the base and emitter being formed by diffusion through a Si oxide mask 15. The collector, base, and emitter base junctions comprise depletion layers 16, 17, and the oxide mask also passivates the surface portions of the junctions. Annular and circular apertures 18, 19 for base and emitter contacts are etched through the oxide layer, and a gold collector electrode 20 is provided on opposite face 21. The oxide layer 15 tends to lower the resistivity of the surface of annular portion 22 of the collector, and to diminish the thickness of the surface portions of the collector-base junction depletion layer, but base contact 23 in aperture 18 is connected to a field electrode 24 on the oxide layer overlying the collector portions 22, which is maintained at a potential difference thereto, producing an electric field across the oxide layer and counteracting the reduction in thickness of the depletion layer. This increases the breakdown value of the collector-base junction. The base and emitter contacts 23, 25 in apertures 18, 19 and the field electrode 24 are formed by selectively etching an aluminium layer deposited on the apertured oxide layer 15, and the field electrode 24 is connected to base contact 23 by a narrow aluminium neck or a small diameter wire 26 spanning a minor part of the surface of the depletion layer of PN junction 16, to avoid instability thereof.