Showing papers on "Fault current limiter published in 2019"

A DC-Reactor-Based Solid-State Fault Current Limiter for HVdc Applications

Abstract: Expansion of high-voltage dc (HVdc) systems to multi-terminal HVdc (MT-HVdc) systems/grids considerably increases the short-circuit levels. In order to protect the emerging MT-HVdc systems/grids against fault currents, proper dc fault current limiters (FCLs) must be developed. This paper proposes an innovative high inductance solid-state dc-reactor-based FCL (HISS-DCRFCL) to be used in HVdc applications. In fact, during the HISS-DCRFCL normal operation, its inductance value is extremely low, and its value becomes considerably high during the fault period, which decreases the fault current amplitude. The proposed HISS-DCRFCL performance is analyzed by MATLAB/Simulink and the simulation results are verified and confirmed by laboratory experimental results using a scaled-down laboratory prototype setup.

Optimal Allocation of Distributed Generation With Optimal Sizing of Fault Current Limiter to Reduce the Impact on Distribution Networks Using NSGA-II

Abstract: Nowadays, the presence of distributed generation (DG) units in the distribution network is increasing due to their advantages. As well as these advantages, there are some problems, such as increasing the level of short circuits in buses and disturbing the protection operation of the network. The main objective of this paper is optimal using of fault current limiters (FCLs) in series with DG units to reduce the negative impacts of the DG units. The method of simultaneously determining the optimal location and size of DGs and the optimal size of FCLs is proposed in this paper. By appropriate allocation of DG units in the distribution network, a considerable reduction in the size of fault current limiters can be achieved. The locations of DG units are considered to be discrete variables and the sizes of FCLs and DGs to be continuous variables, and a nondominated sorting genetic algorithm (NSGA-II) is used to reduce losses and optimize the sizes of fault current limiters. The proposed method is implemented on two test networks and the results demonstrate the efficiency of the method.

Self-Powered 380 V DC SiC Solid-State Circuit Breaker and Fault Current Limiter

Abstract: This paper presents a new ultrafast dc solid-state circuit breaker (SSCB) that uses a silicon carbide cascode as the main switching and limiting semiconductor and an isolated photovoltaic driver to control it. The proposed topology is self-powered and fully implemented with discrete parts. The SSCB's cascode can work in three different states—fully on during nominal operation, linear mode for current limitation, and fully off to disconnect the load. The time the SSCB operates in linear mode and the maximum current limit is easily set by discrete components. Control inputs have also been included to reset the SSCB after a fault has been removed or to remotely switch it on or off . This device can be used in dc distribution avoiding deterioration due to the problems associated with electric arcs and mechanical aging of moving parts, limiting inrush currents and also minimizing conduction losses respect other kind of circuit breakers. Functional, thermal, and efficiency tests have been carried out with three different 380 V prototypes. Experimental results show the excellent behavior of the SSCB, it is able to block a 380 V short circuit failure in 570 ns; the authors have not found any faster results in the literature.

Application of SMES-FCL in electric aircraft for stability improvement

Abstract: The increase in aircraft passengers and airfreight traffic has given rise to concerns about greenhouse gas emissions for traditional aircraft and the resulting damage to the environment. This has led several companies and organizations, including NASA, to set goals to enhance aircraft efficiency as well as reduce fuel burn, pollution, and noise for commercial aircraft. The most notable electric aircraft (EA) concept is the N3-X, which was developed by NASA to achieve environmental goals while maintaining the annual growth of the aviation industry. However, one of the main challenges that EA is facing is their overall weight. This paper proposes and explores an improved power system architecture for use in EA, based on the N3-X concept. The number of superconducting magnetic energy storage (SMES) and fault current limiter (FCL) devices required can be reduced by utilizing multifunctional superconducting devices that combine the functionalities of both a SMES and a FCL, thus reducing the weight and cost of the EA by eliminating a complete device. The proposed control technique offers greater flexibility in determining the appropriate size of coils to function as a FCL, based on the fault type. The proposed EA power system architecture including the SMES-FCL devices is modelled in Simulink/MATLAB to test the system performance under different failure scenarios.

Development and test of a 220 kV/1.5 kA resistive type superconducting fault current limiter

Abstract: Within a collaboration of Jiangsu Zhongtian and Beijing Jiaotong University, one phase of 220 kV/1.5 kA resistive type superconducting fault current limiter (SFCL) has been developed for testing. The current limiting unit of the SFCL consists of 8 series connected modules, and each of the module is composed of 16 parallel connected bifilar coils. The used high temperature superconductor (HTS) is the 12 mm wide steel-stabilized YBCO conductor supplied by Shanghai Superconductor. The current limiting unit is assembled in a cryostat with liquid nitrogen. The device has been successfully subjected to steady-state tests, fault current limiting tests and insulation tests. According to the testing results, the SFCL passed 22 current limiting tests at various prospective fault currents between 10 and 63 kArms for a fault duration of 100 ms, and the maximum limiting resistance could be as high as 3.5 Ω. The power frequency test at 360 kVrms for 1 min and lightning impulse test at 850 kV(1.2 µs/50 µs) have been carried out according to the Chinese national standard GB 1094.3.

Fault Ride through Capability Augmentation of a DFIG-Based Wind Integrated VSC-HVDC System with Non-Superconducting Fault Current Limiter

Abstract: This paper proposes a non-superconducting bridge-type fault current limiter (BFCL) as a potential solution to the fault problems of doubly fed induction generator (DFIG) integrated voltage source converter high-voltage DC (VSC-HVDC) transmission systems. As the VSC-HVDC and DFIG systems are vulnerable to AC/DC faults, a BFCL controller is developed to insert sizeable impedance during the inception of system disturbances. In the proposed control scheme, constant capacitor voltage is maintained by the stator VSC (SVSC) controller, while current extraction or injection is achieved by rotor VSC (RVSC) controller. Current control mode-based active and reactive power controllers for an HVDC system are developed. Balanced and different unbalanced faults are applied in the system to show the effectiveness of the proposed BFCL solution. A DFIG wind-based VSC-HVDC system, BFCL, and their controllers are implemented in a real time digital simulator (RTDS). The performance of the proposed BFCL control strategy in DFIG-based VSC-HVDC system is compared with a series dynamic braking resistor (SDBR). Comparative RTDS implementation results show that the proposed BFCL control strategy is very efficient in improving system fault ride through (FRT) capability and outperforms SDBR in all cases considered.

A Compound Current Limiter and Circuit Breaker

Abstract: The protection of sensitive loads against voltage drop is a concern for the power system. A fast fault current limiter and circuit breaker can be a solution for rapid voltage recovery of sensitive loads. This paper proposes a compound type of current limiter and circuit breaker (CLCB) which can limit fault current and fast break to adjust voltage sags at the protected buses. In addition, it can act as a circuit breaker to open the faulty line. The proposed CLCB is based on a series L-C resonance, which contains a resonant transformer and a series capacitor bank. Moreover, the CLCB includes two anti-parallel power electronic switches (a diode and an IGBT) connected in series with bus couplers. In order to perform an analysis of CLCB performance, the proposed structure was simulated using MATLAB. In addition, an experimental prototype was built, tested, and the experimental results were reported. Comparisons show that experimental results were in fair agreement with the simulation results and confirm CLCB’s ability to act as a fault current limiter and a circuit breaker.

Series Resonance Fault Current Limiter (SRFCL) with MOV for LVRT Enhancement in DFIG-Based Wind Farms

Abstract: —To reduce the negative effects of wind farms connection on power system stability, many countries have elaborated grid code requirements. Low-voltage ride through (LVRT) capability is the ...

LVRT capability enhancement of DFIG based wind turbine with coordination control of dynamic voltage restorer and inductive fault current limiter.

Abstract: According to the coordination control of a dynamic voltage restorer (DVR) and an inductive fault current limiter (FCL), this paper proposes an efficient low-voltage ride-through (LVRT) scheme for a doubly fed induction generator (DFIG) based wind turbine. The DVR is located to the DFIG’s stator circuit for stabilizing the terminal voltage and decreasing the generator current. The inductive FCL is connected to the DFIG’s rotor circuit for suppressing the rotor overcurrent and protecting the converter. Theoretical discussions on structure, principle and scale criterion of the combined DVR-FCL are conducted, and simulation analyses of the proposed approach to handle symmetrical and asymmetrical faults are done in MATLAB/Simulink. In this study, the dynamic characteristics of the DFIG during the faults are analyzed from multiple aspects, and a detailed comparison of the proposed approach and the single action of DVR or FCL is carried out. From the simulation results, the effectiveness and superiority of the proposed approach are well demonstrated.

Model Predictive Control Approach for Bridge-Type Fault Current Limiter in VSC-HVDC System

Abstract: Voltage source converter–high-voltage DC (VSC-HVDC) system has number of advantages over traditional line commutated converter HVDC. However, VSC-HVDC system is exposed to high current due to faults having great negative effect on converters. In order to limit fault current to relatively low level, this paper proposes model predictive control (MPC)-based bridge-type fault current limiter (BFCL) for VSC-HVDC system. Fault current limiters are placed with the AC grid sides of VSC-HVDC system. Finite control set MPC is developed for the control of VSC-HVDC system along with BFCL. BFCL controller has been developed to insert resistance and reactance during disturbances. Balanced and unbalanced disturbances are applied to evaluate the effectiveness of proposed BFCL controller so as to limit the fault current and augment transient stability. Real-time digital simulator has been used to conduct simulation works. The performance of the proposed MPC-BFCL is compared with that of series dynamic braking resistor (SDBR). Comparative simulation results show that the proposed MPC-BFCL is superior over SDBR in improving dynamic stability of VSC-HVDC system.

Design of a Solid-State Circuit Breaker for a DC Grid-Based Vessel Power System

Abstract: Electric propulsion and integrated hybrid power systems can improve the energy efficiency and fuel consumption of different kinds of vessels. If the vessel power system is based on DC grid distribution, some benefits such as higher generator efficiency and lower volume and cost can be achieved. However, some challenges remain in terms of protection devices for this kind of DC grid-based power system. The absence of natural zero crossing in the DC current together with the fast and programmable breaking times required make it challenging. There are several papers related to DC breaker topologies and their role in DC grids; however, it is not easy to find comprehensive information about the design process of the DC breaker itself. In this paper, the basis for the design of a DC solid-state circuit breaker (SSCB) for low voltage vessel DC grids is presented. The proposed SSCB full-scale prototype detects and opens the fault in less than 3 µs. This paper includes theoretical analyses, design guidelines, modeling and simulation, and experimental results.

Microgrids interconnection to upstream AC grid using a dual-function fault current limiter and power flow controller: principle and test results

Abstract: This study presents a novel magnetic-based solid-state dual-function fault current limiter and power flow controller (FLPFC) that offers a promising application for safe and controllable interconnection of microgrids to upstream AC grids. The proposed structure includes series reactors and power electronic switches that protects microgrid from upstream AC grid short-circuit fault and it controls the power flow between microgrid and upstream grid. Performance of the proposed FLPFC is analysed and simulated using Matlab/Simulink and results are confirmed by experimental tests.

Enhancing the fault ride through capability of DFIG-based wind energy system using saturated core fault current limiter

Abstract: Doubly fed induction generator (DFIG) is the most popular machine for the wind power application that consists of the ability for variable speed operation and reactive power control with the help of power electronics converters. It is one of the prominent system that follows grid code requirement as it remains connected with the grid even during the fault occurrence. For making the DFIG continuity in the grid, low-voltage ride through or fault ride through (FRT) techniques are used. Fault current limiter is one of the major schemes used under the FRT. A saturated core fault current limiter (SCFCL) is used in DFIG system to enhance the FRT capability. The main property of SCFCL is the change in permeability between the saturated and unsaturated conditions of the magnetic core to concurrently provide low steady-state impedance and high transient fault impedance for limiting the fault current.

Assessment of appropriate SFCL type considering DC fault interruption in full bridge modular multilevel converter HVDC system

Abstract: The modular multilevel converter (MMC) is the most promising converter topology for implementations of voltage source converter (VSC) high-voltage direct-current (HVDC) grid. Existing research has focused on operational characteristics and improvement of efficiency by optimizing the control. Among various MMC topologies, a full bridge (FB) sub-module (SM) MMC with fault interruption capability has attracted attention because it does not require a dc circuit breaker. However, the most severe faults on dc line, can cause steeply rising fault currents with high peak magnitude, but there is a lack of literature regarding fault current reduction in FB-MMC systems. This problem can be overcome by applying the fault current limiter (FCL) and the superconducting fault current limiters (SFCLs), which have already been developed for the ac grid, have been considered in this paper. We have verified the applicability of two well-known SFCL types i.e., resistive SFCL (R-SFCL) and saturated iron core type SFCL (SIC-SFCL) in FB-MMC grid. Current limiting characteristics and energy dissipation has been according to the location of fault on dc line has been studied. We compared the merits and demerits of the aforementioned SFCLs based on the simulation results. The results indicate, SIC-SFCL to be the most suitable fault current limiter for FB-MMC HVDC system application. © 2001 Elsevier Science. All rights reserved

A Multi-Inductor H Bridge Fault Current Limiter

Abstract: Current power systems will suffer from increasing pressure as a result of an upsurge in demand and will experience an ever-growing penetration of distributed power generation, which are factors that will contribute to a higher of incidence fault current levels. Fault current limiters (FCLs) are key power electronic devices. They are able to limit the prospective fault current without completely disconnecting in cases in which a fault occurs, for instance, in a power transmission grid. This paper proposes a new type of FCL capable of fault current limiting in two steps. In this way, the FCLs’ power electronic switches experience significantly less stress and their overall performance will significantly increase. The proposed device is essentially a controllable H bridge type fault current limiter (HBFCL) that is comprised of two variable inductances, which operate to reduce current of main switch in the first stage of current limiting. In the next step, the main switch can limit the fault current while it becomes open. Simulation studies are carried out using MATLAB and its prototype setup is built and tested. The comparison of experimental and simulation results indicates that the proposed HBFCL is a promising solution to address protection issues.

Modified Secondary-Control-Based Fault Current Limiter for Inverters

Abstract: Fault current limiters (FCLs) are one of the main solutions to upcoming challenges in the microgrid protection. Regarding the high penetration of distributed generations (DGs) in the future power system, designing cheap and effective FCLs is a necessity. This letter addresses this issue by proposing an embedded FCL operating based on modifying the secondary control of the inverter. As this method is presented for a four-wire system, besides very low implementing cost, it has independency and flexibility to only limit the current of the DG faulted phase. This letter also provides real-time simulation results by real time simulator (OPAL-RT) to compare the proposed method with a virtual-impedance-based FCL to validate its effectiveness. Finally, experimental results are presented to validate the effectiveness of the proposed FCL.

A Novel Three-Phase Saturable-Core Fault Current Limiter Structure

Abstract: Fault current limiters (FCLs) can play an important role in providing protection of power systems against high fault current levels. This paper proposes a new three-phase structure of saturable-core FCL based on the common core for all three phases. Due to the existence of flux linkage between all three phases, the resulting electromagnetic fluxes negate each other, and therefore the inductance in the normal condition is significantly reduced. In this structure, the dc winding compensates just the imbalance of phase currents in the system. Therefore, the number of dc winding turns decreases, and consequently the induced voltage across this winding is reduced. This structure leads to a significant reduction in the volume of the core. The FCL design algorithm with the new structure is presented. In order to validate the effectiveness of the proposed FCL, simulation is carried out based on the finite-element method and a prototype is made and tested. The results prove the efficiency of the proposed method.

Appropriate Protection Scheme for DC Grid Based on the Half Bridge Modular Multilevel Converter System

Abstract: The half bridge (HB) modular multilevel converter (MMC) technology is considered a breakthrough to mitigate the shortcomings of the conventional voltage source converter (VSC) in high-voltage direct-current (HVDC) grid application. However, interruption of the DC fault is still a challenge due to fast di/dt and extremely high levels of DC fault current. The fault interruption using a DC circuit breaker (DCCB) causes enormous energy dissipation and voltage stress across the DCCB. Therefore, the use of a fault current limiter is essential, and the superconducting fault current limiter (SFCL) is the most promising choice. Past literature has focused on the operating characteristics of DCCB or limiting characteristics of the SFCL. However, there is little understanding about the fault interruption and system recovery characteristics considering both DCCB and SFCL. In this paper, we have presented a comparative study on fault interruption and system recovery characteristics considering three types of fault limiting devices in combination with circuit breaker. The transient analyses of AC and DC system have been performed, to suggest the most preferable protection scheme. It has been concluded that, amongst the three fault limiting devices, the Hybrid SFCL in combination with circuit breaker, delivers the most desirable performance in terms of interruption time, recovery time, energy dissipation and voltage transients.

Hybrid superconducting fault current limiting CORC Ⓡ wires with millisecond response time

Abstract: The extensive development of Conductor on Round Core (CORC) cables and wires has resulted in round, multi-strand, high-temperature superconductors (HTS) with engineering critical current densities (Je) over 200 Amm −2 at 77 K, or over 800 Amm at 50 K when cooled with cryogenic helium gas. The inherent fault current limiting (FCL) capabilities during direct current operation of a short kA-class CORC wire of less than 4 mm in diameter are demonstrated in liquid nitrogen, developing nearly instantaneous voltages in excess of 20 Vm that increased to about 70 Vm within 15 ms of applied overcurrents up to 250% of the critical current (Ic). The CORC ® wire response time and reactive voltage is comparable to that of a single tape, but at a much higher critical current and without the risk of burnout. The performance of the 0.15 m long CORC wire remained unchanged after close to 100 overcurrent events with peak dissipation of 150–190 kWm. Each event in which a total energy up to 1.4 kJ m was dissipated in the CORC wire resulted in a rapid heating followed by a subsequent thermal quench. The significant challenge to remove the heat from the FCL cable after a fault has cleared when cooled with helium gas in future naval power cables is addressed. Operation of the CORC FCL conductor in stand-alone operation and operated as part of a hybrid-cable system, in which the overcurrent is instantly redirected to a normal conducting path outside of the cryogenic environment, is demonstrated without any degradation of the CORC wire performance. The results show that highly flexible CORC wires offer a straightforward path to safely increasing the operating current of FCL conductors beyond that of single tapes, without compromising their response time and voltage, while potentially allowing fast recovery times even when cooled with cryogenic helium gas.

A Comprehensive Review on Fault Current Limiter for Power Network

Abstract: Existing Power system has a major role indistributed generation. As the power systems are arriving more and more complicated they are becoming an incorporation of some power electronic devices. Limiting the fault current is important as the protection of power electronic devices as well as the reliability of system is depending upon it. This paper is consisting of the current limiting techniques which are used to suppress the excess magnitude of fault current during fault. Various types of fault current limiters are used in the power system. The focus here is on superconducting fault current limiting reactors. SFCL is a device which overcomes the problems due to the increased fault current levels. In this paper operating principle and structure of various power current limiters is explained thoroughly.

Development of an IGBT-Diode based Fault Current Limiter for Fault Ride-Through Enhancement in Microgrid Application

Abstract: This paper deals with a developed insulated gate bipolar transistor (IGBT) and diode based fault current limiter (FCL) for simple microgrid application. The developed FCL utilizes a three-phase circuit arrangement that has fault current limiting ability with an uncomplicated control strategy that simply samples the voltage at the point of common coupling (PCC) for the FCL control using Clarke’s Transformation, low pass filtering and pulse generating circuit. The IGBT-Diode based FCL regulates the magnitude of the fault current and enhances the PCC voltage under transient faults to ensure continuous supply of active and reactive power to the local load of the microgrid irrespective of the transient condition of the main grid. The power electronic switching arrangement employed interfaces the grid using an isolating transformer whose primary is connected in series with the feeder line and the secondary is shorted by an optimally sized AC reactor. The IGBT-Diode switching operations for the pre-fault, fault and post-fault conditions are triggered by the control proposed which detects fault occurrence in less than a period. The analytical investigation of the IGBT-Diode switched FCL is presented in details and the results of simulation lay credence to effectiveness of the developed FCL in improving Fault Ride-Through (FRT).

Current-limiting characteristics of saturated iron-core fault current limiters in VSC-HVDC systems based on electromagnetic energy conversion mechanism

Abstract: A common method to examine the current-limiting performance of saturated iron-core fault current limiter (SI-FCL) in high-voltage direct-current transmission based on voltage source converter (VSC-HVDC) systems is to solve differential equations based on the system fault transient characteristics and the equivalent inductance calculation equation. This method analyzes the fault current of the VSC-HVDC system in the time domain. However, it is computationally complex and cannot directly reflect the relationship between parameters and the current-limiting effect of the SI-FCL. In this paper, the relationship between the magnetic flux density and magnetic field energy of the SI-FCL is analyzed. The energy exchange between the DC capacitor and the SI-FCL in the DC short circuit fault process is analyzed. From the perspective of electromagnetic energy conversion, the criterion for determining the current-limiting ability of the SI-FCL in the transient process is given based on the parameters of the SI-FCL and VSC-HVDC system. On this basis, the characteristics of the DC side fault current and the capacitor voltage when the SI-FCL has current-limiting ability are examined. Based on the parameters of the SI-FCL and VSC-HVDC system, a method for calculating the fault current peak value and capacitor voltage drop time is given. Finally, the accuracy of the analysis of the SI-FCL in the VSC-HVDC system based on the electromagnetic energy conversion mechanism is demonstrated through a case study and simulation results of the VSC-HVDC system with different SI-FCLs.

Improvement of Fault Ride Through Capability of DFIG-based Wind Turbine Systems Using Superconducting Fault Current Limiter

Abstract: Due to high penetration of renewable energy in grid, the latest grid codes require that Wind Turbines (WT) stay connected to the grid and provide reactive power support for grid voltage recovery. This paper proposes a technique to improve Fault Ride Through (FRT) capability of a Doubly Fed Induction Generator (DFIG) bases WT system. The proposed technique is implemented through a resistive type Superconducting Fault Current Limiter (SFCL). The SFCL is introduced in two locations in DFIG circuit; firstly in Rotor Side Converter (RSC) and secondly in Grid Side Converter (GSC) to decrease rotor and stator currents respectively. The scheme is tested on a 1.5 MW DFIG based grid-connected Wind Turbine system. Simulation results show that the SFCL at proposed locations limits rotor and stator currents, electromagnetic torque oscillations, DC link over voltage and also help in grid voltage recovery. The scheme efficiently improves the FRT capability of the WT system and fulfills the grid code requirements.

A Comparative Investigation of Presaturated Core Fault Current Limiters Biased by DC Current and Permanent Magnet

Abstract: In this paper, the dc biasing magnetomotive force (mmf) in presaturated core fault current limiter (PCFCL) is replaced with permanent magnet (PM) to overcome the well-known drawbacks of the dc biased PCFCLs. These drawbacks are excessively induced voltage across the terminals of the dc coil during fault condition and high total power losses during the steady-state condition. The novel contributions of this paper are the introduction of the selection criteria of PM material and its representation by actual nonlinear $B$ – $H$ hysteresis loop of Jiles-Atherton method, and the use of PM alone as an equivalent to the dc biasing coils for three-phase fault current limiter (FCL), contrary to work reported in earlier papers. Single- and three-phase PCFCLs are modified by replacement of dc saturation coil by the equivalent PM through time-domain finite element (FE) simulation of COMSOL Multiphysics package. Experimental verification shows that the implementation of accurate nonlinear representation of PM demagnetization curve with FE simulation gives a realistic performance of the PM biased PCFCL, especially in the fault condition. The performance of PCFCL can be evaluated through the voltage drop and total power losses during the steady-state condition and the fault current clipping ratio during fault condition of the grid. Furthermore, a comparative investigation of dynamic behavior is considered between dc and PM biased PCFCLs. It is found that the PM biased PCFCL has enriched capability of limiting any type of fault current with leading advantages of reduced voltage drop and power losses significantly together with risk elimination of the high induced voltage across dc coil terminals. Moreover, the governing parameters of PM biased PCFCLs are subjected to performance analysis to study their inherent effects.

Transmission Investment and Expansion Planning for Systems With High-Temperature Superconducting Cables

Abstract: Growing electric power demand in densely populated metropolitan areas presents problems due to the lack of availability of space to build transmission lines and due to short-circuit current limits. One of the solutions to meet the increasing demand is high-temperature superconducting (HTS) cables, which have a sufficiently high capacity and can be installed in the limited space of existing ducts. However, since the characteristics of low-impedance HTS cables result in higher system short-circuit levels, fault current limiter (FCL) HTS cables have been developed to solve the fault current problem without an upgrade of the rating of the existing circuit breakers, which is typically necessary when new power facilities in the power system are installed. This paper investigates the impacts of the installation of HTS cables on optimal transmission expansion planning (TEP). A three-stage TEP framework (identification, system analysis, and optimization) is proposed to select between plain HTS or FCL-HTS cables, and to determine the locations of new transmission expansion lines. The TEP optimization problem is formulated using mixed integer linear programming with the big-M method. The simulation results showed that the benefits of installing the FCL-HTS cable can justify their high installation costs.

Recovery Characteristics of GdBCO Tape in a Pressurized Liquid Nitrogen for a Resistive SFCL

Abstract: Superconducting fault current limiters (SFCLs) are required to recover to the superconducting state as quickly as possible after limiting the fault current. It is important for the quick recovery to improve the cooling property of a superconducting tape. The boiling phenomena of liquid nitrogen on the surface of a superconducting tape have large influence on its cooling property. In this paper, we used GdBCO tapes for the resistive SFCL and investigated the effect of applying pressure for improvement of its recovery characteristics. In addition, we observed the difference of the boiling phenomena on the surface of GdBCO tapes between under pressurized condition and under ambient pressure by a high-speed video camera.