Showing papers on "Multiplexer published in 2005"

A 24-GHz SiGe phased-array receiver-LO phase-shifting approach

Abstract: A local-oscillator phase-shifting approach is introduced to implement a fully integrated 24-GHz phased-array receiver using SiGe technology. Sixteen phases of the local oscillator are generated in one oscillator core, resulting in a raw beam-forming accuracy of 4 bits. These phases are distributed to all eight receiving paths of the array by a symmetric network. The appropriate phase for each path is selected using high-frequency analog multiplexers. The raw beam-steering resolution of the array is better than 10deg for a forward-looking angle, while the array spatial selectivity, without any amplitude correction, is better than 20 dB. The overall gain of the array is 61 dB, while the array improves the input signal-to-noise ratio by 9 dB

Wavelength-selective 1/spl times/K switches using free-space optics and MEMS micromirrors: theory, design, and implementation

Abstract: The design and performance of several generations of wavelength-selective 1/spl times/K switches are reviewed. These optical subsystems combine the functionality of a demultiplexer, per-wavelength switch, and multiplexer in a single, low-loss unit. Free-space optics is utilized for spatially separating the constituent wavelength division multiplexing (WDM) channels as well as for space-division switching from an input optical fiber to one of K output fibers (1/spl times/K functionality) on a channel-by-channel basis using a microelectromechanical system (MEMS) micromirror array. The switches are designed to provide wide and flat passbands for minimal signal distortion. They can also provide spectral equalization and channel blocking functionality, making them well suited for use in transparent WDM optical mesh networks.

Digital broadcast transmitting/receiving system having an improved receiving performance and signal processing method thereof

Abstract: A digital broadcast transmitting/receiving system and a signal processing method thereof that can improve the receiving performance of the system. A digital broadcast transmitter has a randomizer to randomize an input data stream which has null bytes being inserted at a specified position, a multiplexer to output a data stream formed by inserting specified known data into the position of the null bytes of the randomized data stream, an encoder to encode the data stream outputted from the multiplexer, and a modulator/RF-converter to modulate the encoded data, RF-convert the modulated data and transmit the RF-converted data. The receiving performance of the digital broadcast transmitting/receiving system can be improved even in a multi-path channel by detecting the known data from the received signal and using the known data in synchronization and equalization in a digital broadcast receiver.

Reconfigurable optical add-drop multiplexer using microring resonators

Abstract: We report a reconfigurable four-channel optical add-drop multiplexer for use in access networks. The optical add-drop multiplexer (OADM) is based on vertically coupled thermally tunable Si/sub 3/N/sub 4/--SiO/sub 2/ microring resonators (MRs) and has been realized on a footprint of 0.25 mm/sup 2/. Individual MRs in the OADM can be tuned across the full free-spectral range of 4.18 nm and have a 3-dB bandwidth of 50 GHz.

Frequency-domain multiplexed readout of transition-edge sensor arrays with a superconducting quantum interference device

Abstract: We demonstrate an eight-channel frequency-domain readout multiplexer for superconducting transition-edge sensors (TESs). Each sensor is biased with a sinusoidal voltage at a unique frequency. The sensor currents are summed and measured with a single superconducting quantum interference device (SQUID) array. The 100-element SQUID array is operated with shunt feedback electronics that have a slew rate of 1.2×107Φ0∕s at 1MHz. The multiplexer readout noise is 6.5pA∕Hz, which is well below the expected sensor noise of 15pA∕Hz. We measure an upper limit on adjacent channel crosstalk of 0.004, which meets our design requirements. The demodulated noise spectra of multiplexed TESs are white at frequencies down to 200mHz.

Multiplexer for a piezo ceramic identification device

Abstract: Provided is a multiplexer for a biometric apparatus. The multiplexer includes a plurality of first conductors coupled to the first ends of piezo ceramic elements in corresponding rows and a plurality of first switches each of which is coupled to a respective one of the first conductors and a plurality of second conductors coupled to the second ends of piezo ceramic elements in corresponding columns. The multiplexer also includes a plurality of second switches each of which is coupled to a respective one of the second conductors. The first conductors are approximately orthogonal to the second conductors, and the first switches are controlled to couple a signal output from an output port of the signal generator to a particular piezo ceramic element of the at least twenty five thousand piezo ceramic elements. The second switches are controlled to couple a signal associated with the particular piezo ceramic element of the at least twenty five thousand piezo ceramic elements to an input port of the processor.

Integrated optical multiplexer and demultiplexer for wavelength division transmission of information

Abstract: A multiplexer/demultiplexer is provided for optical interconnection between electronic components on an integrated circuit chip. The multiplexer/demultiplexer includes a substrate formed with an array of photo emitters/detectors and conditioning electronics coupled thereto. A first layer of optically transparent material is formed on the substrate overlying the emitters/detectors and a second layer of optically transparent material, functioning as an optical waveguide, is formed on the first layer. A binary blazed grating is formed at the interface of the two layers. For multiplexing, discrete wavelength optical signals are modulated with data, emitted by the emitters, intercepted by the binary blazed grating, and multiplexed into a polychromatic beam for transmission through the waveguide. For demultiplexing, the discrete wavelengths are separated by the binary blazed grating and directed to corresponding detectors. The conditioning electronics receive and demodulate the output of the detectors to extract data, and format the data for communication with electronic components.

Single inductor multiple-input multiple-output switching converter and method of use

Abstract: A single inductor multiple-input multiple-output (SI-MIMO) switching converter time-multiplexes different input power sources through only one inductor to provide multiple regulated output voltages, which can be used to power up different blocks of a portable electronic device (or whatever else it is used for) and at the same time to charge up a rechargeable battery. Power multiplexing is achieved by input switches that are also the switching elements of the switching converter, thus eliminating an additional power multiplexer.

Hybrid infrared detector array and CMOS readout integrated circuit with improved dynamic range

Abstract: A hybrid image sensor includes an infrared detector array and a CMOS readout integrated circuit (ROIC). The CMOS ROIC is coupled to at least one detector of the IR detector array, e.g., via indium bump bonding. Each pixel of the CMOS ROIC includes a first, relatively lower gain, wide dynamic range amplifier circuit which is optimized for a linear response to high light level input signals from the IR detector. Each pixel also includes a second, relatively higher gain, lower dynamic range amplifier circuit which is optimized to provide a high signal to noise ratio for low light level input signals from the IR detector (or from a second IR detector). A first output select circuit is provided for directing the output of the first circuit to a first output multiplexer. A second output select circuit is provided for directing the output of the second circuit to a second output multiplexer. Thus, separate outputs of the first and second circuits are provided for each of the individual pixel sensors of the CMOS imaging array.

Investigation of thermo-optic effect and multi-reflector tunable filter/multiplexer in SOI waveguides

Abstract: The paper presents an analysis of thermo-optic phase shifters in silicon-on-insulator (SOI) waveguide structures. It gives recommendations to provide high tuning characteristics at minimum power requirements. Then, this analysis is applied to the description of a novel type of reconfigurable optical add/drop multiplexer (ROADM) utilizing multi-reflector (MR) beam expanders and thermo-optic tuning in SOI structures. It is intended for use in high dense wavelength-division-multiplexing (HDWDM) flexible fiber-optic networks having multi-hundreds wavelength channels and advanced ITU grids (12.5 GHz, 25 GHz, 50 GHz).

Upstream only linecard with front end multiplexer for cmts

Abstract: An upstream line card including a digital or analog multiplexer (10) front end circuit for a Cable Modem Termination System. Each upstream line card has only upstream receivers (52) and allows a CMTS to share one or a handful of receiver chips to receive and recover data from a larger number of input cables ( 12) coupled to the front end multiplexer. A control circuit ( 46) for the multiplexer uses MAP data and buret assignment data (54) and upstream mini-slot counts for each of the input cables to determine when a buret is about to arrive on a cable and cause appropriate switching by the multiplexer or crossbar switch. In some embodiments, there is only one RF channel circuit coupled to the output of the multiplexer, so the multiplexer is controlled to couple the input cable upon which the buret is expected to the single RF channel. In other embodiments, there are multiple RF channels coupled to the inputs of the multiplexer so the multiplexer is controlled to connect each input cable on which a burst is expected to an available RF channel. In some embodiments, the sample data generated by each RF channel is buffered and an arbiter picks one burst at a time for application to the input of a CMTS receiver or doles out bursts to different receivers. In other embodiments, no buffers or arbiter are used, and each RF channel has its own dedicated CMTS receiver.

Dual-source optical wavelength processor

Abstract: An optical signal manipulation system and, in particular a reconfigurable optical add/drop multiplexer for applications in WDM networks is disclosed. The system (100) includes an array of input and output ports (101-104) for carrying a series of optical signals to be manipulated, a polarisation manipulation element (115), such as a walk-off crystal, for spatially separating the series of optical signals into a first and a second group, a wavelength dispersion element (171), such as diffraction grating, for subsequently angularly dispersing by wavelength the first and second group of optical signals, and a wavelength processing means (180) for processing the spatially separated wavelengths. The wavelength processing means (180) may be a liquid crystal on silicon spatial light modulator having a plurality of independently addressable pixels for modifying the phase and/or amplitude of light passing through the modulator.

Wavelength blocking filter with flexible data rates and channel spacing

Abstract: This work presents a high-resolution (13.2 GHz) channel-blocking optical filter, suitable for use as a reconfigurable optical add/drop multiplexer (ROADM), which seamlessly supports data rates from 2.5 to 160 Gb/s. The filter consists of a linear array of 64 MEMS micromirrors and a high-dispersion echelle grating. The demonstrated device had an insertion loss of 9 dB, a loss ripple of 1.2 dB, and a group delay ripple of 15 ps. Data transmission through the device with various mixed data rate scenarios ranging from 2.5 to 160 Gb/s showed negligible penalty, except at 40 Gb/s where a maximum penalty of 1.5 dB was observed due to a phase coherence with the blocker filter ripple.

CMOS active pixel sensor with improved dynamic range and method of operation

Abstract: A CMOS imaging array includes a plurality of individual pixels arranged in rows and columns. Each pixel is constructed the same and includes a photodetector (e.g., photodiode) receiving incident light and generating an output. A first, relatively lower gain, wide dynamic range amplifier circuit is provided responsive to the output of the photodetector. The first circuit is optimized for a linear response to high light level input signals. A second, relatively higher gain, lower dynamic range amplifier circuit is also provided which is responsive to the output of the photodetector. The second circuit is optimized to provide a high signal to noise ratio for low light level input signals. A first output select circuit is provided for directing the output of the first circuit to a first output multiplexer. A second output select circuit is provided for directing the output of the second circuit to a second output multiplexer. Thus, separate outputs of the first and second circuits are provided for each of the individual pixel sensors of the CMOS imaging array. Alternative embodiments incorporate two ore more photodetectors and two or more amplifier circuits and output select circuits. Three photodetectors and three amplifier circuits are useful for an embodiment where the sensor includes a three-color filter matrix.

Managing traffic in a satellite transmission system

Abstract: Methods and apparatus are described for management of traffic comprising a statistical shaper having a plurality of inputs each for receiving a data stream and a plurality of outputs forming a variable rate bit streams; a multiplexer which combines the bit streams to form an output stream; a modulation stage which is operable to use one or more of a plurality of different modulation schemes to modulate the bit streams onto an output bearer; and, a controller which is operable to control the amount of data arriving at the modulation stage. The controller performs rate control of the data arriving at the modulation stage so that the rate of data output in the output stream from the modulator stage is within a predetermined limit for the transmission channel. For example if the modulation rate for any one bitstream changes, this would alter the rate of data transmission after the modulation stage except that excess data is stored in buffers. For example, by controlling the data rate arriving at the modulator stage, the controller regulates the amount of data stored in buffers at the modulation stage.

A 165-Gb/s 4:1 multiplexer in InP DHBT technology

Abstract: This paper presents a 4:1 multiplexer fabricated in InP double heterojunction bipolar transistor (DHBT) technology. The multiplexer works up to 165 Gb/s at a supply voltage of -3.2 V consuming 1.6 W. It is a half-rate multiplexer using a multi-phase clock architecture. The main design challenge was to ensure correct timing between clock and data signals

Design of multigigabit multiplexer-loop-based decision feedback equalizers

Abstract: This paper presents novel approaches for pipelining of parallel nested multiplexer loops and decision feedback equalizers (DFEs) based on look-ahead techniques. Look-ahead techniques can be applied to pipeline a nested multiplexer loop in many possible ways. It is shown that not all the look-ahead approaches necessarily result in improved performance. A novel look-ahead approach is identified, which can guarantee improvement in performance either in the form of pipelining or parallelism. The proposed technique is demonstrated and applied to design multiplexer-loop-based DFEs with throughput in the range of 3.125-10 Gb/s.

Versatile logic element and logic array block

Abstract: An embodiment of this invention pertains to a versatile and flexible logic element and logic array block (“LAB”). Each logic element includes a programmable combinational logic function block such as a lookup table (“LUT”) and a flip-flop. Within the logic element, multiplexers are provided to allow the flip-flop and the LUT to be programmably connected such that either the output of the LUT may be connected to the input of the flip-flop or the output of the flip-flop may be connected to the input of the LUT. An additional multiplexer allows the output of the flip-flop in one logic element to be connected to the input of a flip-flop in a different logic element within the same LAB. Output multiplexers selects between the output of the LUT and the output of the flip-flop to generate signals that drive routing lines within the LAB and to routing lines external to the LAB. These output multiplexers are constructed such that the combinational output (output from the LUT) is faster than the output from the flip-flop. A collection of routing lines and multiplexers within the LAB are used to provide inputs to the LUTs. Each of the input multiplexers for each logic element is connected to a subset of the routing lines within the LAB using a specific pattern of connectivity of multiplexers to associated wires that maximizes the efficiency of use of the routing wires. Control signals for the set of logic elements within the LAB are generated using a secondary signal generation unit that minimizes contention for shared signals. One of the control signals is an “add-or-subtract control signal” that allows all of the LEs in a LAB to perform either addition or subtraction under the control of a logic signal. In a PLD supporting redundancy, the carry chain for the LABs is arranged in the same direction that redundancy shifts to remap defective LABs and a multiplexer on the carry input of a LAB is used to select the appropriate carry output from another LAB depending on whether redundancy is engaged.

Design of a high-Q channel add-drop multiplexer based on the two-dimensional photonic-crystal membrane structure.

Abstract: A significant improvement on the basic design of a channel add-drop multiplexer of the in-plane type, based on the two-dimensional photonic-crystal membrane structure of triangular-lattice holes, has been made to increase the channel-selectivity Q factor as high as 7300, which demonstrates the viability of the original basic design. The three-dimensional finite-difference time-domain simulation shows that theoretically it is possible to design a channel add-drop multiplexer with better than -0.7 dB of the forward-drop insertion loss, -29 dB of the pass-through cross-talk at the center frequency. A revised coupled-mode analysis with an augmented directional coupling gives a good agreement between its parametric analysis and the finite-difference time-domain analysis in regard to the detailed asymmetric forward-drop frequency response of the multiplexer.

Novel design and reversible logic synthesis of multiplexer based full adder and multipliers

Abstract: Quantum arithmetic must be built from reversible logic components. This is the driving force for the proposed novel 3/spl times/3 reversible gate termed TKS gate having two of its outputs working as 2:1 multiplexer. The proposed TKS gate is used to design a reversible half adder and is further used to design multiplexer based reversible full adder. The multiplexer based full adder is further used to design reversible 4/spl times/4 Array and modified Baugh Wooley multipliers. A novel 4/spl times/4 multiplier architecture with reversible logic is also proposed in which the partial products can be generated in parallel and their additions are reduced to logarithmic steps. In the proposed multiplier, all the operations are decomposed into levels, thereby significantly reducing the power consumption through a control circuitry which will switch off those levels which are not active. Thus, this work provides the initial threshold to building of complex systems which can execute more complicated operations. The reversible circuits designed and proposed in this paper form the basis for an ALU of a primitive quantum CPU.

Method and apparatus for decomposing functions in a configurable IC

Abstract: Some embodiments of the invention provide a configurable integrated circuit (“IC”). The configurable IC includes a set of multiplexers that each has a set of input terminals, a set of output terminals, and a set of select terminals. The set of multiplexers includes a group of multiplexers, where at least one input terminal of each multiplexer in the group is a permanently inverting input terminal. During at least a set of cycles during the operation of the configurable IC, several multiplexers in the group of multiplexers are used to implement a particular function.

Programmable logic block having lookup table with partial output signal driving carry multiplexer

Abstract: A programmable logic block provides to a carry chain multiplexer an output signal representing a partial output signal from a programmable lookup table (LUT), e.g., an output signal having a value that depends upon fewer than all of the data input signals of the LUT. In one embodiment, a first LUT output terminal provides a signal that depends upon fewer than all of the LUT data input signals, and the second LUT output terminal provides a signal that depends upon all of the LUT data input signals. In another embodiment, the first output signal depends upon X of the input signals and the second output signal depends upon Y of the input signals, X and Y being positive integers, X being less than Y. The first LUT output terminal drives a data input terminal, and the second LUT output terminal drives a select input terminal, of the carry chain multiplexer.

Method and system of providing multi-user access to a packet switched network

Abstract: An approach for providing multi-user access to a packet switched network via a shared Ethernet-based local area network (LAN) is disclosed. Multiple end user stations are connected to the LAN, in which each of end user stations executes a communication software. The communication software is based upon a communication protocol (e.g., Point-to-Point Protocol (PPP)) that establishes a point-to-point communication session. The end user stations generate packets based upon the communication protocol. In addition, each of the end user stations selectively encapsulates the communication protocol packets using the Ethernet-based LAN protocol. Further, attached to the LAN is a customer premise equipment (CPE), which transmits the encapsulated packets to a line terminating equipment, which according to one embodiment is a digital subscriber line (DSL) access multiplexer that is located in a central office. The line terminating equipment transports the multiple PPP sessions to a multiplexer/demultiplexer, which is located within a regional carrier's network. In one embodiment, the multiplexer/demultiplexer is an Asynchronous Transfer Mode (ATM) switch, which simultaneously transports the multiple PPP sessions over a single permanent virtual circuit (PVC); VPI/VCIs (Virtual Path Identifier/Virtual Connection Identifier) are mapped to the multiple PPP sessions. The multiple PPP sessions are terminated at a remote access server, which recovers and forwards the packets to a backbone router. Thereafter, the backbone router forwards the packets to the packet switched network.

Data driving apparatus in a current driving type display device

Abstract: A current output device of a data driving apparatus sequentially applying data signals to data lines. The data signals correspond to analog converted output currents and the current output device includes a switch controlling supply of the analog output currents according to a first control signal, a master current sample/hold circuit sampling or holding the analog output currents according to a second control signal, a slave current sample/hold circuit holding or sampling the analog output currents according to a third control signal, and a multiplexer selecting an output current held in the master current sample/hold circuit or the slave current sample/hold circuit according to the fourth control signal and applying the selected output current to a corresponding data line.

Distributed statistical multiplexing of multi-media

Abstract: A method of distributed statistical multiplexing of video data. The method includes generating a plurality of blocks forming a pre-processed video media corresponding to an original video media, the plurality of blocks including, for one or more sub-portions of the original video media, a plurality of interchangeable blocks that represent the sub-portion. Optionally, at least some of the blocks are transmitted to at least one multiplexer and reconstructed by the at least one multiplexer, for a plurality of communication channels, from at least some of the transmitted blocks.

Readout apparatus and imaging apparatus

Abstract: An imaging apparatus includes a sensor array, readout apparatus, and control circuit. The readout apparatus includes first LPFs arranged in correspondence with signal lines, an analog multiplexer, and a second LPF. The cut-off frequencies of the first and second LPFs can be switched on two stages, and the control circuit switches the cut-off frequencies of the first and second LPFs in accordance with the imaging mode.

Programmable integrated circuit providing efficient implementations of arithmetic functions

Abstract: Efficient implementations of wide logic functions (e.g., priority encoders, AND gates, OR gates) in programmable ICs include carry chain multiplexers driven by dual-output programmable function generators. A function generator having two output signals is programmed to generate first and second function output signals. The first and second functions can optionally share some or all of the input signals. The first function output signal drives the select terminal of a carry multiplexer, which selects between a carry in input signal and the second function output signal to provide the carry out output signal. The wide function result is provided by the final carry multiplexer in a chain of such carry multiplexers. In an exemplary wide AND gate, the first function is an AND function, and the second function is ground. In an exemplary wide OR gate, the first function is a NOR function, and the second function is power high VDD.

System and apparatus for a carrier class wdm pon accommodating multiple services or protocols

Abstract: A Passive Optical Network (PON) is provided with capability for multiple protocols and service suppliers by employing Wavelength Division Multiplexer (WDM) elements (32) in combination with optical couplers (36) at optical distribution nodes (ODN) intermediate a local exchange office and a customer node. The local exchange office node 30 transmitting and receiving signals from a single optical fiber (38) through a WDM providing M/2 wavelength pairs for use with differing protocols and each customer node connected to one leg of an optical coupler (36) in the ODN with a WDM (40) associated with one of the wavelength pairs for received and transmitted signals.

Gasinsulation combined electric device local discharge analog experimental apparatus and experimental method

Abstract: The simulating experiment equipment for local discharge in gas insulated combined electric appliance consists of inducing pressure regulator, no-corona experiment transformer, no-local discharge protecting resistor, standard capacity voltage divider, GIS simulating experimental device, internal UHF antenna sensor and external UHF antenna sensor, microstrip line filtering amplifier, intelligent UHF multiplexer, wide band high speed ultrahigh capacirty digital storage oscilloscope and microcomputer. The simulating experiment equipment and method for local discharge in gas insulated combined electric appliance may be used for simulating various defaults inside GIS to obtain PD experiment data reflecting various kinds of insulation defaults and distinguish the PD modes of the insulation defaults in GIS, so that the present invention may be used widely in relevant theoretical analysis and application research.

Multiplexing communication system and crosstalk elimination method

Abstract: In a system where a quantum channel and a classical channel are multiplexed on a single optical transmission line and information is transmitted from a transmitter to a receiver through the quantum channel, the classical channel is inhibited from affecting the quantum channel. To this end, the transmission characteristics of a transmitter-side wavelength multiplexer/demultiplexer for the classical channel, the transmission characteristics of a receiver-side wavelength multiplexer/demultiplexer for the quantum channel, and the optical power of a light source for the classical channel are designed so that crosstalk light due to spontaneous emission light and crosstalk light due to nonlinear optical effects can be suppressed, and the classical channel does not affect the quantum channel.