Showing papers on "Proximity effect (electron beam lithography) published in 1987"

Point exposure distribution measurements for proximity correction in electron beam lithography on a sub‐100 nm scale

Abstract: The exposure distribution function in electron beam lithography, which is needed to perform proximity correction, is usually simulated by Monte Carlo techniques, assuming a Gaussian distribution of the primary beam. The resulting backscattered part of the exposure distribution is usually also fitted to a Gaussian term. In this paper we demonstrate a technique, using a very high contrast resist, whereby the normalized point exposure distribution can be measured experimentally, both on solid substrates which cause backscattering, and on thin substrates where backscattering is negligible. The data sets so obtained can be applied directly to proximity correction and represent the practical conditions met in pattern writing. Results are presented of the distributions obtained on silicon, gallium arsenide, and thin silicon nitride substrates at different beam energies. Significant deviations from the commonly assumed double Gaussian distributions are apparent. On GaAs substrates the backscatter distribution cannot adequately be described by a Gaussian function. Even on silicon a significant amount of exposure is found in the transition region between the two Gaussian terms. This deviation, which can be due to non‐Gaussian tails in the primary beam and to forward scattering in the resist, must be taken into account for accurate proximity correction in most submicron lithography, and certainly on the sub‐100 nm scale.

Ion Beam Lithography

Abstract: Apparatus and method for projection ion beam lithography are described which allow formation of low distortion, large field, reduced images of a mask pattern at a wafer plane using an optical column of practical size. The column shown is comprised of an accelerating Einzel lens followed by a gap lens, with numerous cooperating features. By coordinated selection of the parameters of the optical column, lens distortion and chromatic blurring are simultaneously minimized. Real time measurement of the position of the image field with respect to the existing pattern on the wafer is employed before and during the time of exposure of the new field and means are provided to match the new field to the existing pattern even when the latter has been distorted by processing. A metrology system enables convenient calibration and adjustment of the apparatus.

The effect of acceleration voltage on linewidth control with a variable‐shaped electron beam system

Abstract: Variable‐shaped electron beam systems offer high throughput in electron beam lithography. However, excessive heating of resist on low thermal conductivity substrates and the proximity effect act to degrade the linewidth of photomasks. The effect of acceleration voltage (15, 20, and 30 kV) and electron beam size (0.5–4 μm⧠) linewidth was investigated in positive (RE5000P) and negative (CMS) resist. An acceleration voltage of 20 kV is seen to be suitable for mask fabrication in patterns with features larger than 1 μm from the viewpoint of linewidth accuracy and pattern quality.

Comparison of proximity effects in contrast enhancement layer and bilayer resist processes

Abstract: Both contrast enhancement layer (CEL) and bilayer resist (PCM) processes, when compared to single layer resist process, promise to extend the useful resolution capability of optical projection printers. Using experimental results and sample simulation, the performances of the CEL and the PCM processes are compared in terms of linewidth control and proximity effects as a function of feature size, dose, and focus. The performances of the PCM and the CEL processes are almost equivalent on polysilicon substrates both experimentally and in simulation. On an aluminum substrate, the CEL process suffers from a large proximity effect which is not seen in the simulation. The PCM process, however, is unaffected by the substrate reflectivity because of the high absorption in the planarization layer. The observed results for the CEL may be caused by lateral scattering of energy from the unmasked areas into the masked areas from the rough aluminum surface. Another possibility is an increase of flare because of high substrate reflection, but simulation shows that this increase would have to be more than 6%.

Submicron electron-beam lithography using a beam size comparable to the linewidth control tolerance

Abstract: Presently available electron‐beam lithography systems for submicron lithography have minimum beam sizes or edge resolution on the order of 0.1–0.2 μm. Satisfactory proximity correction, linewidth control, and profile quality are critically dependent on beam size. Moreover, variations in beam size about the expected size can result in severe degradation of linewidth control. In this paper, we will examine the relationships between linewidth control, beam size, and proximity correction and show that it is possible, but difficult, to successfully use electron‐beam lithography under these conditions. High resolution vector scan electron‐beam systems with known Gaussian beam sizes are used to produce features down to 0.25 μm in single and multilayer resist. It is shown that the beam size and forward scattering must be included in the proximity correction of submicron patterns. The effects of varying the beam size are also investigated and it is shown, for example, that an increase in beam size of only 0.02 μm can significantly reduce the developed resist linewidth of sub‐half‐micron features in 1.0 μm thick resist.

A Proximity Effect Measuring Test Chip - Design And Application

Abstract: An electrical tester has been designed for measuring proximity effect in e-beam lithography. The tester consists of a clover-shaped van der Pauw resistor for sheet resistance measurement, a four-terminal resistor for linewidth measurement, and a second four-terminal resistor of identical width but with adjacent bars for evaluating changes due to proximity exposure. The test chip is composed of a set of testers with various combinations of linewidth, bar size, and intermediate space, ranging in dimension from 0.5 μm to 10 μm. Computer software has been developed to interface a commercial computer to the wafer prober for fully automated data acquisition, statistical analysis, and graphic display. The test system yields very high precision in both the sheet resistance (3 a < 1% of nominal) and electrical linewidth (3 a < 0.01 μm). The accuracy of the linewidth data has been verified by SEM measurements. The chip can serve as a general purpose metrology tool to evaluate the efficacy of different proximity correction techniques in e-beam lithography, to complement SEM linewidth measurements which suffer from profile and threshold dependence especially for non-vertical sidewalls, and to monitor linewidth control for submicron process development. Using an e-beam exposure tool at 20kV, the chip has been delineated in GMC, a negative imaging resist, in a trilevel resist structure, on substrates of tantalum silicide and aluminum. These substrates correspond to the GATE and the METAL level substrates in a MOS integrated circuit. In addition, it has been delineated in chromium, a typical photomask substrate, using single layer resist. The extent of proximity exposure effect on each of these substrates is reported. Linewidth deviations of 0.1 μm or greater are observed for near-micron equal line and space patterns. In addition, proximity exposure increases with incident exposure dose and the atomic number of the substrate. On the basis of these results, VLSI layout constraints arising from e-beam proximity exposure are identified.

Three Dimensional Process Simulator for Photo and Electron Beam Lithography, and Estimations of Proximity Effects

Abstract: In both photo lithography with reduction projection printings and electron beam lithography with direct writing techniques, their resolutions are limited by the proximity effect caused by the diffraction in photo lithography and electron backscattering in electron beam lithography, respectively. To evaluate and clear them, computer simulation is very useful for sub-micron pattern fabrications.

Monte Carlo simulation of the energy dissipation profiles of 30, 50 and 100 keV incident beams in a layered structure in electron beam lithography

Abstract: This paper presents a Monte Carlo simulation of the energy dissipation profiles of 30, 50 and 100 keV incident beams in thin film (0.4μm) of electron resist, polymethyl methacrylate (PMMA), on thick silicon substrate in electron beam lithography. The radial scattering and the energy loss of incident electrons (including backscattered electrons from the substrate) are simulated under the illumination of ideal point source and Gaussian round beam spot source, and the histories of 30000–50000 electrons are computed.

Direct-Write Electron Beam Lithography For Integrated Circuits: Submicron Image Reversal Process Of Novolac-Diazo Resist And Its Stability Towards Composite Metallization In Bipolar Gate Arrays For Vlsi

Abstract: Considerable effort has recently been directed at the development of direct write electron beam lithography techniques for the fabrication of custom gate arrays with the submicron design rules. Advantages include quick turn around time for prototype circuits as well as the elimination of the mask fabrication cost. In this paper, a lithographic technique for the patterning of submicron dimensions using an image reversal process and its process stability for the layered structures of TiW/A1-2% Cu interconnect metallization in a double metal technology for the prototyping of bipolar gate arrays, are described. This image reversal process for AZ1470 photoresist differs from that of Oldham and Heike (reference number 6) in that an extra edge exposure of electron dose is given to the resist to create electron density difference between exposed and unexposed areas and also to achieve vertical sidewall of the resist profile. The various processing parameters are optimized to obtain 90A‚° sidewall of the resist profile with 0.25pm gate metal features, with high contrast and high aspect ratio. Resolution between 1.0pm and 2.0pm (1.0pm lines and 1.5pm spaces) on TiW/A1-2% Cu electrode metallization patterns were obtained in lithographic evaluation of this image reversal process for the fabrication of bipolar gate arrays. Such resulting patterns have the following characteristics: no notching or necking of the pattern, reduced proximity effect with no feature biasing needed, higher etch resistance of novolac resist, higher speed of electron beam exposure, and compatibility of the resist and equipment for standard processing. Isolated gate features as small as 0.25pm and 1.0pm lines and 1.5pm spaces on metallization patterns in prototyping for bipolar gate arrays have been realized by this lithographic process using direct write electron beam technique.

Method and apparatus for exposure by electron beam

Abstract: PURPOSE:To enable the easy realization of reduction of a proximity effect, by utilizing a ghost effect without causing reduction of a throughput in a beam exposure process. CONSTITUTION:Exposure pattern data are converted into pattern data expressed in dots, and a converged beam B1 is applied in the form of a dot to a desired address unit position, while the irradiation by a non-converged beam B2 is conducted simultaneously. Thereby an area of exposure by the non-converged beam B2 thicker than the converged beam B1 turns to exist around a desired area (e.g. a rectangular pattern indicated by a solid line) of exposure by the converged beam. By this method, the outer side of the desired area of exposure is exposed uniformly by the non-converged beam B2, and a proximity effect is reduced by a ghost effect.

Charged particle beam exposing method

Abstract: PURPOSE:To reduce the influence of a proximity effect due to the difference of the uneven surface of a base and reflected electron coefficient by emitting to correct a charged particle beam or an electromagnetic wave to a part of a resist film having a less rearward scattered particle amount when emitting the beam in the same amount to the whole surface of the film. CONSTITUTION:A wiring pattern 42 made a metal film is formed on an Si substrate 41, an insulating film 43 of SiO2 or the like and a metal film 44 of molybdenum silicide or the like are formed on the pattern, the film 44 is coated with a resist 45, and an electron beam 46 is emitted to be corrected only to the recess of the film 44. This emission is executed by forming an inverting pattern data on the basis of the pattern data in case of forming the pattern 42 of the base and then selectively emitting the beam on the basis of the inverted pattern data. Then, an electron beam 47 is selectively emitted in response to a pattern to be formed on the resist 45, the resist 45 is exposed, and developed to form a resist pattern. Thus, the dose of a part having less rearward scattering electron amount can be raised to reduce the influence of a proximity effect caused by the rearward scattering electrons.

Formation of pattern

Abstract: PURPOSE:To decrease proximity effect without deteriorating performance in an electron-optical system to enable a pattern to become fine with high precision, by forming a resist film through an incident electron-interrupting film, which is made of heavy metal or material containing heavy metal, on a pattern- formed plane. CONSTITUTION:A silicon oxidizing film 2 is formed on the surface of a silicon substrate 1 or on a surface. An incident electron-interrupting film such as a tungsten film 3, made of heavy metal or material containing heavy metal, is formed thereon. Then, a resist film for electron beams such as a negative-type silicon-containing resist film 4. is formed thereon by coating. Then, when a pattern is pictured on the silicon-containing resist film 4 to be developed using prescribed developing solution, the pattern 4' of the silicon-containing resist film is formed with highly precise patterning. Replacing a base material of the resist film by tungsten enables mutual interaction between neighboring exposure patterns to be sufficiently reduced to widely decrease proximity effect. Then, the tungsten film is selectively removed, with the silicon-containing resist film pattern 4' serving as mask, to obtain a part 3' which is covered with the silicon-containing resist film pattern 4'.

Patter forming method

Abstract: PURPOSE:To improve resolution of the pattern by wholly exposing the resist with a quantity of light of a range which does not reach to sensitizing, before an exposing step. CONSTITUTION:The shading film 12 is coated on the glass substrate 11, and the positive type resist 13A is coated on the film 12, and the whole surface of the resist 13A is preliminary exposed for the prescribed time by means of a reduced projecting exposure apparatus. As the result, the resist 13A becomes to the state (resist 13B) of increasing the sensitivity by activating fairly the resist 13A. And then, by effecting primary exposure through a leticle formed a prescribed pattern thereon, the primary expose time for patterning, namely, the quantity of the exposing light is lessened. Thus, as the influence of proximity effect is reduced, the resist pattern 13D having a sharp edge is obtd, thereby improving the resolution of the pattern.

Simulaiton of contrast enhanced lithography

Abstract: The SAMPLE program has been modified to incluc, contrast enhand lithography. The contrast enhancement material (CEM) and the underlying photoresist are bleached simultaneously to include coupled exposure effects. The CEM is modeled using Dill's model for positive photoresist and a bleachable index of refraction. An energy increment selection routine has been implemented to allow proper convergence for contrast enhanced lithography. An analytical solution to Dill's equations by Babu and Barouch is included for increased speed and reduced storage. The modified program is used to compare several different lithographic techniques to CEM. Simulation shows that the resolution capability and exposure latitude of CEM is superior to single layer photoresists. The CEId and bilayer resist (PCM) processes are equivalent in resolution, linewidth control, and proximity effects both experimentally and in simulation on silicon substrates. Experhentally, however, CEM suffers fiom a much larger proximity effect than PCM on aluminum substrates which is not seen in simulations. Several factors which are not included in the simulation such as lated scattering fiom the substrate and flare may be responsible.