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Showing papers on "Tantalum capacitor published in 2003"


Patent
14 Apr 2003
TL;DR: In this paper, a monolithic capacitor structure includes opposed and overlapping plates within a dielectric body, which are arranged to form a lower frequency, higher value capacitor Other conductive structure is located either inside the dielectrics body or on an external surface thereof.
Abstract: A monolithic capacitor structure includes opposed and overlapping plates within a dielectric body, which are arranged to form a lower frequency, higher value capacitor Other conductive structure is located either inside the dielectric body or on an external surface thereof and is effective to form a higher frequency, lower value capacitor in parallel with the lower frequency, higher value capacitor The resulting array of combined series and parallel capacitors integral with the dielectric body provides effective wideband performance in an integrated, cost-effective structure

133 citations


Patent
28 Jan 2003
TL;DR: In this paper, a dielectric film is formed on a free-standing conductive metal layer to form a multi-layer foil, which is used for the manufacture of capacitors.
Abstract: A dielectric film is formed on a free-standing conductive metal layer to form a multi-layer foil comprising a conductive metal layer, a barrier layer and a dielectric oxide layer Such multi-layer foils are mechanically flexible, and useful for the manufacture of capacitors Examples of barrier layers include Ni—P or Ni—Cr alloys After a second layer of conductive metal is deposited on a dielectric oxide surface opposing the first conductive metal layer, the resulting capacitor foil is processed into a capacitor The resulting capacitor is a surface mounted capacitor or is formed as a integrated or embedded capacitor within a circuit board

80 citations


Patent
11 Aug 2003
TL;DR: In this paper, a single high k or ferroelectric dielectric layer is used to form decoupling capacitors and analog capacitor segments in series with one another, wherein the capacitor segments may be connected in reverse polarity relationship to provide symmetrical performance characteristics for the analog capacitors.
Abstract: Semiconductor devices and methods for making the same are described in which a single high k or ferroelectric dielectric layer is used to form decoupling capacitors and analog capacitor segments. Analog capacitors are formed by coupling analog capacitor segments in series with one another, wherein the capacitor segments may be connected in reverse polarity relationship to provide symmetrical performance characteristics for the analog capacitors.

75 citations


Patent
07 Apr 2003
TL;DR: In this article, the capacitance electrode can be formed using a tantalum precursor including tantalum elements and bonding elements that are chemically bonded to the tantalum element, and the precursor can include at least one tantalum amine derivative and/or tantalum halide derivative.
Abstract: Methods of forming a capacitor can include forming a capacitor electrode including tantalum nitride. The capacitor electrode can be formed using a tantalum precursor including tantalum elements and bonding elements that are chemically bonded to the tantalum elements. Moreover, the tantalum precursor can include at least one of a tantalum amine derivative and/or a tantalum halide derivative. Related methods of forming integrated circuit devices are also discussed.

66 citations


Patent
04 Aug 2003
TL;DR: In this paper, the present inventors discovered through extensive study that wet-tantalum capacitors exhibit progressively worse charging efficiency over time, and devised unique reform techniques for wet-TantalUM capacitors.
Abstract: Miniature defibrillators and cardioverters detect abnormal heart rhythms and automatically apply electrical therapy to restore normal heart function. Critical components in these devices are aluminum electrolytic capacitors, which store and deliver one or more life-saving bursts of electric charge to a heart of a patient. This type of capacitor requires regular “reform” to preserve its charging efficiency over time. Because reform expends valuable battery life, manufacturers developed wet-tantalum capacitors, which are generally understood not to require reform. Yet, the present inventors discovered through extensive study that wet-tantalum capacitors exhibit progressively worse charging efficiency over time. Accordingly, to address this problem, the inventors devised unique reform techniques for wet-tantalum capacitors. One exemplary technique entails charging wet-tantalum capacitors to a voltage equal to about 90% of their rated voltage and maintaining this voltage for about five minutes before discharging them.

50 citations


Patent
31 Jan 2003
TL;DR: In this article, an electrolyte for an electrolytic capacitor has been proposed, which is chemically compatible to aluminum and tantalum oxide dielectrics and withstands higher voltage while maintaining good conductivity, making it especially useful for high voltage applications, such as occur in an implantable cardiac defibrillator.
Abstract: The present invention is directed to an electrolyte for an electrolytic capacitor. The capacitor has an electrolytic anode and an electrochemical cathode. The electrolyte has water, a water soluble organic salt, and a relatively weak organic acid. This electrolyte is chemically compatible to aluminum and tantalum oxide dielectrics and withstands higher voltage while maintaining good conductivity. This makes the electrolyte especially useful for high voltage applications, such as occur in an implantable cardiac defibrillator.

46 citations


Patent
17 Mar 2003
TL;DR: A solid electrolytic capacitor as discussed by the authors is composed of a metal electrode employing a metal, a dielectric layer formed on a surface of the metal electrode, and a carbon material layer overlaid on the layer.
Abstract: A solid electrolytic capacitor of the invention includes a metal electrode employing a metal, a dielectric layer formed on a surface of the metal electrode and composed of an oxide of the metal, and a carbon material layer overlaid on the dielectric layer.

45 citations


Patent
29 Dec 2003
TL;DR: In this paper, the authors proposed a capacitor of a semiconductor device, which includes a capacitor lower electrode and a capacitor upper electrode, which can improve the electrical properties of the device.
Abstract: Provided is a capacitor of a semiconductor device. The capacitor includes a capacitor lower electrode disposed on a semiconductor substrate. A first dielectric layer comprising aluminum oxide (Al 2 O 3 ) is disposed on the capacitor lower electrode. A second dielectric layer comprising a material having a higher dielectric constant than that of aluminum oxide is disposed on the first dielectric layer. A third dielectric layer comprising aluminum oxide is disposed on the second dielectric layer. A capacitor upper electrode is disposed on the third dielectric layer. The capacitor of the present invention can improve electrical properties. Thus, power consumption can be reduced and capacitance per unit area is high enough to achieve high integration.

41 citations


Proceedings ArticleDOI
T. Remmel1, Rampi Ramprasad1, J. Walls1
13 May 2003
TL;DR: In this article, the leakage capacitance of the MIM capacitor as a function of process conditions and lifetime behavior under both DC and AC stressing is presented. But the authors focus on a single-input single-output (SIMO) MIM capacitance.
Abstract: Reliability assessment was used extensively during the development of allow leakage tantalum oxide MIM (metal-insulator-metal) capacitor targeted for a Cu-based wireless integrated circuit platform. Leakage of the MIM capacitor as a function of process conditions and lifetime behavior under both DC and AC stressing is presented.

40 citations


Patent
27 Nov 2003
TL;DR: In this article, a miniature solid electrolytic capacitor is provided, which is suitable for being disposed within an electrically insulating layer, and is connected to other component using electrically conductive adhesive with a connection resistance at an anode low and with connection reliability improved.
Abstract: A miniature solid electrolytic capacitor is provided, which is suitable for being disposed within an electrically insulating layer, and is connected to other component using an electrically conductive adhesive with a connection resistance at an anode low and with connection reliability improved. Specifically, the electrolytic capacitor includes a valve metal element for an anode 10 having a capacitor forming part 10A and an electrode lead part 10B, a dielectric oxide film 11 formed on the valve element, a solid electrolyte layer 12 formed on the dielectric oxide film 11 and a charge collecting element for a cathode 13 formed on the solid electrolyte layer 12, wherein at least one through hole 15 is formed in the electrode lead part 10B so as to expose a core 10C of the valve metal element, and an exposed portion 10D of the core is used for connecting portion.

38 citations


Patent
04 Feb 2003
TL;DR: In this article, the authors proposed a DRAM-based capacitor processing method, in which an electric field is applied to the capacitor dielectric region to cause oxygen vacancies to migrate towards one of the first and second interfaces.
Abstract: A capacitor processing method includes forming a capacitor comprising first and second electrodes having a capacitor dielectric region therebetween. The first electrode interfaces with the capacitor dielectric region at a first interface. The second electrode interfaces with the capacitor dielectric region at a second interface. The capacitor dielectric region has a plurality of oxygen vacancies therein. After forming the capacitor, an electric field is applied to the capacitor dielectric region to cause oxygen vacancies to migrate towards one of the first and second interfaces. Oxygen atoms are preferably provided at the one interface effective to fill at least a portion of the oxygen vacancies in the capacitor dielectric region. Preferably at least a portion of the oxygen vacancies in the high k capacitor dielectric region are filled from oxide material comprising the first or second electrode most proximate the one interface. In one implementation, a DRAM processing method includes forming DRAM circuitry comprising DRAM array capacitors having a common cell electrode, respective storage node electrodes, and a high k capacitor dielectric region therebetween. A voltage is applied to at least one of the first and second electrodes to produce a voltage differential therebetween under conditions effective to cause oxygen vacancies in the high k capacitor dielectric region to migrate toward one of the cell electrode or the respective storage node electrodes and react with oxygen to fill at least a portion of the oxygen vacancies in the capacitor dielectric region.

Patent
20 Oct 2003
TL;DR: In this paper, a solid electrical capacitor having lower ESR and fewer short circuit from processing is obtained by adhering a number of islands of a material more basic than the dielectric coating on an anode before forming a conductive polymer on the polyamide polymer by a chemical oxidation process.
Abstract: A solid electrical capacitor having lowered ESR and fewer short circuit from processing is obtained by adhering a number of islands of a material more basic than the dielectric coating on an anode before forming a conductive polymer on the dielectric coating by a chemical oxidation process.

Patent
Ki-yeon Park1, Sung-tae Kim, Young-sun Kim, In-sung Park, Jae-hyun Yeo, Ki-Vin Im 
12 Nov 2003
TL;DR: In this paper, a semiconductor memory device that includes a composite Al2O3/HfO2 dielectric layer with a layer thickness ratio greater than or equal to 1, and a method of manufacturing the capacitor are provided.
Abstract: A semiconductor memory device that includes a composite Al2O3/HfO2 dielectric layer with a layer thickness ratio greater than or equal to 1, and a method of manufacturing the capacitor are provided. The capacitor includes a lower electrode, a composite dielectric layer including an Al2O3 dielectric layer and an HfO2 dielectric layer sequentially formed on the lower electrode, the Al2O3 dielectric layer having a thickness greater than or equal to the HfO2 dielectric layer, and an upper electrode formed on the composite dielectric layer. The Al2O3 dielectric layer has a thickness of 30-60 Å. The HfO2 dielectric layer has a thickness of 40 Å or less.

Patent
06 Mar 2003
TL;DR: Capacitors and interconnection structures for silicon carbide are provided having an oxide layer, a layer of dielectric material and a second oxide layer on top of the oxide layer as mentioned in this paper.
Abstract: Capacitors and interconnection structures for silicon carbide are provided having an oxide layer, a layer of dielectric material and a second oxide layer on the layer of dielectric material. The thickness of the oxide layers may be from about 0.5 to about 33 percent of the thickness of the oxide layers and the layer of dielectric material. Capacitors and interconnection structures for silicon carbide having silicon oxynitride layer as a dielectric structure are also provided. Such a dielectric structure may be between metal layers to provide a metal-insulator-metal capacitor or may be used as a inter-metal dielectric of an interconnect structure so as to provide devices and structures having improved mean time to failure. Methods of fabricating such capacitors and structures are also provided.

Patent
06 Mar 2003
TL;DR: In this paper, a capacitor and a capacitor dielectric material are fabricated by adjusting the amount of an ionic conductive species, such as hydrogen, contained in the capacitance to obtain predetermined electrical or functional characteristics.
Abstract: A capacitor and a capacitor dielectric material are fabricated by adjusting the amount of an ionic conductive species, such as hydrogen, contained in the capacitor dielectric material to obtain predetermined electrical or functional characteristics. Forming the capacitor dielectric material from silicon, nitrogen and hydrogen allows a stoichiometric ratio control of silicon to nitrogen to limit the amount of hydrogen. Forming the capacitor by dielectric material plasma enhanced chemical vapor deposition (PECVD) allows hydrogen bonds to be broken by ionic bombardment, so that stoichiometric control is achieved by controlling the power of the PECVD. Applying a predetermined number of thermal cycles of temperature elevation and temperature reduction also breaks the hydrogen bonds to control the amount of the hydrogen in the formed capacitor dielectric material.

Journal ArticleDOI
TL;DR: In this article, a 5 A tantalum nitride interface layer was added to the hafnium-doped tantalum oxide high dielectric constant thin film to improve its dielectrics.
Abstract: Drastic improvement of the dielectric properties of the hafnium-doped tantalum oxide high dielectric constant thin film with the insertion of a 5 A tantalum nitride interface layer was observed. The film's breakdown strength, leakage current, and apparent dielectric constant were improved with the addition of the interface layer. However, the interface layer introduced additional fixed charges to the film, which can only be partially removed with the 700°C annealing step. This thin interface layer did not change the phenomenon that the lightly doped film has an anomalous high k value compared with other doped or undoped films. The deposited TaNx interface film contained Ta–N, Ta–O and Si–O bonds after the 700°C anneal, which is a high k film. It also prevented the formation of an interface film with inferior qualities. This interface modification method is viable for future high k gate dielectric applications.

01 Jan 2003
TL;DR: In this article, the authors proposed a theoretical model of NbO-Nb2O5 -MnO2 system and showed that the model shows identical conductivity mechanism as tantalum capacitor, but furthermore a unique mechanism appears after dielectric breakdown.
Abstract: Niobium Oxide capacitor, has already found its place in the market as a cost effective and reliable non-burning component. The study of conductivity mechanisms has been done to prove its excellent stability, reliability and non-burning performance. Set of electrical measurements as VA characteristics in forward and reverse mode, frequency characteristics of capacitance, temperature or time dependence of basic parameters together with measurements of basic physical parameters enabled to propose the theoretical model of NbO – Nb2O5 – MnO2 system. NbO Capacitor shows identical conductivity mechanism as tantalum capacitor, but furthermore a unique mechanism appears after dielectric breakdown. It causes a high resistance failure mode of NbO capacitor and limits the current bellow the capacitor’s thermal runaway point, which prevents capacitor’s burning, whereas filtering characteristics remain unchanged.

Patent
26 Aug 2003
TL;DR: In this article, a method for fabricating a storage capacitor designed as a trench or a stacked capacitor is described, which is used in particular in a DRAM memory cell and includes steps of forming a lower, metallic capacitor electrode, a storage dielectric and an upper capacitor electrode.
Abstract: The present invention relates to a novel method for fabricating a storage capacitor designed as a trench or a stacked capacitor and is used in particular in a DRAM memory cell. The method includes steps of forming a lower, metallic capacitor electrode, a storage dielectric and an upper capacitor electrode. The lower, metallic capacitor electrode is formed in a self-aligned manner on a silicon base material in such a way that uncovered silicon regions are first produced at locations at which the lower capacitor electrode will be formed, and then metal silicide is selectively formed on the uncovered silicon regions.

Patent
15 Jul 2003
TL;DR: In this paper, a valve metal sheet having a porous portion on one side of the sheet, a dielectric layer formed on the porous portion, a solid electrolyte layer formed upon the dielectrics, a collector layer formed over the collector layer, and an electrode terminal insulated from the through-hole electrode and connected to the valve metal sheets.
Abstract: A solid electrolytic capacitor includes a valve metal sheet having a porous portion on one side of the sheet, a dielectric layer formed on the porous portion, a solid electrolyte layer formed on the dielectric layer, a collector layer formed on the solid electrolyte layer, a through-hole electrode connected to the collector layer and penetrating the valve metal sheet to be exposed to the other side of the sheet, and an electrode terminal insulated from the through-hole electrode and connected to the valve metal sheet. The capacitor further includes an insulating portion penetrating the valve metal sheet and a penetration electrode penetrating the insulating portion. The solid electrolytic capacitor has a large capacitance and an excellent radio frequency response, and can be easily mounted on a semiconductor device.

Patent
24 Jun 2003
TL;DR: In this article, a method of manufacturing a semiconductor with a storage capacitor having sufficient memory capacity while requiring a minimum area is provided, which includes steps for manufacturing a storage capacitance of a pixel region that has a structure of a first storage capacitor and a second storage capacitor stacked on top of the other and connected in parallel with each other.
Abstract: A method of manufacturing a semiconductor with a storage capacitor having sufficient memory capacity while requiring a minimum area is provided. The method includes steps for manufacturing a storage capacitor of a pixel region that has a structure of a first storage capacitor and a second storage capacitor stacked on top of the other and connected in parallel with each other. The method further includes steps for forming the first storage capacitor having a first capacitance electrode formed in the same layer as a drain region, a first dielectric, and a second capacitance electrode formed in the same layer as a gate wiring. Still further, the method includes steps for forming the second storage capacitor including the second capacitance electrode, a second dielectric, and a third capacitance electrode formed in the same layer as a light-shielding film.

Journal ArticleDOI
TL;DR: In this article, a deposition process for a high-dielectric constant tantalum pentoxide for integrated capacitors was developed, and thin films were deposited reactively on glass wafers using a radio-frequency magnetron sputtering cluster tool at various O2/Ar flow ratios.

Patent
12 Nov 2003
TL;DR: An electrolyte for an electrolytic capacitor which is high in electrolytic conductivity, excellent in heat stability and high in withstand voltage has been proposed in this article, where the relationship of formulae (I): Y≧−7.5X+150, and X≧4, Y>0.
Abstract: An electrolyte for an electrolytic capacitor which is high in electrolytic conductivity, excellent in heat stability and high in withstand voltage. An electrolyte for an electrolytic capacitor comprising a tetrafluoroaluminate ion; and an electrolyte for an electrolytic capacitor containing a salt and a solvent, characterized in that electrolytic conductivity X (mS·cm−1) at 25° C. and withstand voltage Y (V) of a capacitor satisfy the relationships of formulae (I): Y≧−7.5X+150, and X≧4, Y>0.

Patent
16 Jul 2003
TL;DR: In this paper, the defects contained in the dielectric film of the anode body of a solid electrolytic capacitor have been reduced by decreasing the defects in the Dielectric Film.
Abstract: A solid electrolytic capacitor having a lowered leakage current characteristic and an improved ESR characteristic; which has been implemented by decreasing the defects contained in the dielectric film of the anode body. It includes a valve metal foil which makes anode and a sintered layer provided on the upper and lower surfaces of the valve metal foil, which sintered layer covering the entire surface of side faces of valve metal foil in three directions with exception of the anode lead portion. A flat plane area of valve metal foil, which makes anode, covered with sintered layer is not less than one half of the flat plane area of sintered layer.

Patent
Masahiro Kiyotoshi1
04 Sep 2003
TL;DR: A semiconductor device comprises a semiconductor substrate and a capacitor provided above the substrate, the capacitance comprises a lower electrode containing metal, a dielectric film containing tantalum oxide or niobium oxide, an upper electrode including metal, and at least one of a lower barrier layer which is provided between the lower electrode and the dielectrics film and an upper barrier layer between the upper electrode and dielectrical film, the lower and upper barrier layers being insulating layers which contain silicon and oxygen and containing the oxygen at least in a portion on a side contacting the die
Abstract: A semiconductor device comprises a semiconductor substrate and a capacitor provided above the semiconductor substrate, the capacitor comprises a lower electrode containing metal, a dielectric film containing tantalum oxide or niobium oxide, an upper electrode containing metal, and at least one of a lower barrier layer which is provided between the lower electrode and the dielectric film and an upper barrier layer which is provided between the upper electrode and the dielectric film, the lower barrier layer and the upper barrier layer being insulating layers which contain silicon and oxygen and containing the oxygen at least in a portion on a side contacting the dielectric film.

Patent
Masaaki Kobayashi1, Masaaki Togashi1
18 Jun 2003
TL;DR: In this paper, a three-terminal type solid electrolytic capacitor component is constructed from a foil-like aluminum substrate and an anode electrode with a graphite paste layer and a silver paste layer.
Abstract: An electrode body 100 of a solid electrolytic capacitor component includes a foil-like aluminum substrate 2 whose surface is roughened or enlarged and which is formed with an aluminum oxide film the surface thereof as an insulating oxide film, two foil-like aluminum substrates 3 a, 3 b whose surfaces are not roughened, and two foil-like copper substrates 4 a, 4 b as a metal electric conductor for constituting a lead electrode. On the whole surface of the foil-like aluminum substrate 2 , an anode electrode 14 including a solid high molecular polymer electrolyte layer 11 , a graphite paste layer 12 and a silver paste layer 13 is formed. The thus constituted solid electrolytic capacitor component 110 is accommodated in a substantially closed space defined by a first insulating substrate 21 and a second insulating substrate 22 , thereby fabricating a three-terminal type solid electrolytic capacitor.

Patent
21 Feb 2003
TL;DR: In this article, the authors proposed an approach to provide a semiconductor device in which a structure of a capacitance is simplified by inserting a contact plug in the capacitance and reaching the source-drain regions.
Abstract: It is an object to provide a semiconductor device in which a structure of a capacitor is simplified. Any electrical connection of a capacitor (CP 10 ) and source-drain regions ( 11 ) and ( 13 ) is carried out by a contact plug ( 101 ) inserted in the capacitor (CP 10 ) and reaching the source-drain regions ( 11 ) and ( 13 ). The capacitor (CP 10 ) has a capacitor upper electrode ( 103 ) provided to be embedded in an upper main surface of an interlayer insulating film ( 3 ) and a capacitor dielectric film ( 102 ) provided to cover a side surface and a lower surface of the capacitor upper electrode ( 103 ). Moreover, the capacitor dielectric film ( 102 ) is also provided to cover a side surface of the contact plug ( 101 ) formed to penetrate through the capacitor upper electrode ( 103 ), and a portion of the contact plug ( 101 ) which is covered with the capacitor dielectric film ( 102 ) functions as the capacitor lower electrode ( 101 ).

Patent
Hae-Jeong Lee1, Ho-Kyu Kang1
24 Mar 2003
TL;DR: In this paper, a capacitor array of a semiconductor device including a plurality of capacitors is provided, which includes a lower layer formed over the lower electrodes, and an upper layer forming over the upper layer.
Abstract: A capacitor array of a semiconductor device including a plurality of capacitors is provided. The capacitor array includes a plurality of lower electrodes, which are formed over a semiconductor substrate. A dielectric layer formed over the lower electrodes, and an upper electrode formed over the dielectric layer. The plurality of lower electrodes are insulated from each other either by an insulating layer having pores of a low dielectric constant, or by an air gap.

Patent
Makoto Aoyama1
28 May 2003
TL;DR: In this article, a solid electrolytic capacitor is mounted onto a printed circuit board without worrying about the polarity of the capacitance of the capacitor, and the proximity of the cathode electrode and the respective anode leads serves to reduce the self-induction in a high frequency range.
Abstract: A solid electrolytic capacitor includes a capacitor element and a resin package enclosing the capacitor element. Two anode leads, partially enclosed by the package, are connected to the opposite ends of the anode bar that are allowed to protrude in the opposite directions from an anode chip of the capacitor element. The capacitor element is provided with a cathode layer connected to an external cathode electrode arranged between the paired anode leads. With this symmetrical structure of two anode leads and one cathode electrode, the solid electrolytic capacitor can be mounted onto a printed circuit board without worrying about the polarity of the capacitor. Further, the proximity of the cathode electrode and the respective anode leads serves to reduce the self-induction in a high-frequency range.

Patent
31 Dec 2003
TL;DR: In this paper, a multi-capacitor divider network is proposed in which two capacitors are fabricated in a single package, using a common dielectric material, and the tolerance of the ratio between the high-voltage capacitor and lowvoltage capacitors is within a predetermined range.
Abstract: A novel multi-capacitor divider network in which two capacitors are fabricated in a single package, using a common dielectric material, is disclosed. In a preferred embodiment of the present invention, the multi-capacitor network comprises a high-voltage capacitor and a low-voltage capacitor fabricated in a single monolithic package, both fabricated from a class one dielectric material having a combined tolerance of plus or minus five percent. The use of the same class one dielectric material for both capacitors assures that the temperature coefficents are similar for both capacitors and, more importantly, that the tolerance of the ratio between the high-voltage capacitor and low-voltage capacitor is within a predetermined range.

Journal ArticleDOI
TL;DR: In this article, the dielectric properties of stack capacitors and single-layer capacitors were investigated using x-ray photoelectron spectroscopy and transmission-electron microscopy (TEM).
Abstract: Hafnium–oxide films deposited on a thermally grown SiON film and a hydrogen-terminated Si bare substrate by an atomic-layer-deposition technique have been investigated. Capacitance–voltage measurements show equivalent-oxide thicknesses of about 1.79 nm for a 4.2 nm HfO2/SiON stack capacitor and of about 1.84 nm for a 5.2 nm HfO2 single-layer capacitor. These measurements also show a dielectric constant of 18.1 for the HfO2 in the stack capacitor and of 11.2 for the HfO2 single-layer capacitor. The hysteresis of the stack capacitors is measured to be less than 40 mV, whereas that of the single-layer capacitor is 206 mV. Transmission-electron microscopy (TEM) and x-ray photoelectron spectroscopy indicated that the dielectric films are amorphous structure, rather than crystalline or phase-separated silicide and oxide structures. TEM showed that the interface of the stack capacitor can be stable to at least 850 °C.