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Bernard Brezzo

Researcher at IBM

Publications -  34
Citations -  5401

Bernard Brezzo is an academic researcher from IBM. The author has contributed to research in topics: Adapter (computing) & Field-programmable gate array. The author has an hindex of 17, co-authored 34 publications receiving 4160 citations.

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Journal ArticleDOI

A million spiking-neuron integrated circuit with a scalable communication network and interface

TL;DR: Inspired by the brain’s structure, an efficient, scalable, and flexible non–von Neumann architecture is developed that leverages contemporary silicon technology and is well suited to many applications that use complex neural networks in real time, for example, multiobject detection and classification.
Journal ArticleDOI

TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip

TL;DR: This work developed TrueNorth, a 65 mW real-time neurosynaptic processor that implements a non-von Neumann, low-power, highly-parallel, scalable, and defect-tolerant architecture, and successfully demonstrated the use of TrueNorth-based systems in multiple applications, including visual object recognition.
Proceedings ArticleDOI

A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons

TL;DR: A new architecture is proposed to overcome scalable learning algorithms for networks of spiking neurons in silicon by combining innovations in computation, memory, and communication to leverage robust digital neuron circuits and novel transposable SRAM arrays.
Proceedings ArticleDOI

Database analytics acceleration using FPGAs

TL;DR: This paper presents a Field Programmable Gate Array (FPGA) based acceleration engine for database operations in analytics queries that provides a mechanism for a DBMS to seamlessly harness the FPGA compute power without requiring any changes in the application or the existing data layout.