Showing papers by "Dominique Drouin published in 2017"
TL;DR: In this article, the mesoporous germanium (MP-Ge) was synthesized by using high current density and highfrequency bipolar electrochemical etching, which enables a much better lateral homogeneity of the MP-Ge films.
29 citations
30 Aug 2017
TL;DR: The ExaNoDe H2020 research project is presented, aiming to design a highly energy efficient and highly integrated heterogeneous compute node targeting Exascale level computing, mixing low-power processors, heterogeneous co-processors and using advanced hardware integration technologies with the novel UNIMEM Global Address Space memory system.
Abstract: Power consumption and high compute density are the key factors to be considered when building a compute node for the upcoming Exascale revolution. Current architectural design and manufacturing technologies are not able to provide the requested level of density and power efficiency to realise an operational Exascale machine. A disruptive change in the hardware design and integration process is needed in order to cope with the requirements of this forthcoming computing target. This paper presents the ExaNoDe H2020 research project aiming to design a highly energy efficient and highly integrated heterogeneous compute node targeting Exascale level computing, mixing low-power processors, heterogeneous co-processors and using advanced hardware integration technologies with the novel UNIMEM Global Address Space memory system.
19 citations
TL;DR: In this article, the authors presented the fabrication of complementary resistive switches using the nanodamascene process, and the as-fabricated devices were fully embedded in an insulating oxide, opening the way for further process steps such as threedimensional monolithic integration.
Abstract: This paper presents the fabrication, together with morphological and electrical characterizations of complementary resistive switches using the nanodamascene process. The as-fabricated devices are fully embedded in an insulating oxide, opening the way for further process steps such as three-dimensional monolithic integration. Complementary resistive switches electrical performance is consistent with resistive random access memories fabricated and characterized with the same procedure that showed ${R_{{\rm{OFF}}}}/{R_{{\rm{ON}}}}$ ratios of 100. Complementary operating voltages of ${V_{{\rm{th}}{\text{1,3}}}} = | \text{0.8} |\;{\text{V}}$ and ${V_{{\rm{th}}{\text{2.4}}}} = | \text{1.1} |\;{\text{V}}$ are obtained for 88 × 22 nm2 junction with a 6 nm thick HfO $_x$ junction.
10 citations
TL;DR: In this article, a damascene process was proposed to fabricate embedded gold micro-and nano-structures at the same time, and the material removal rate and selectivity on both gold and silicon dioxide were evaluated as a function of time, applied pressure, platen rotation speed, and slurry flow.
6 citations
TL;DR: In this paper, the authors demonstrate the use of Fully Depleted Silicon On Insulator (FDSOI) transistors as pH sensors with a 23nm silicon nitride sensing layer built in the Back-End-Of-Line (BEOL) process.
Abstract: In this work we demonstrate the use of Fully Depleted Silicon On Insulator (FDSOI) transistors as pH sensors with a 23 nm silicon nitride sensing layer built in the Back-End-Of-Line (BEOL) The back end process to deposit the sensing layer and fabricate the electrical structures needed for testing is detailed A series of tests employing different pH buffer solutions has been performed on transistors of different geometries, controlled via the back gate The main findings show a shift of the drain current (I D ) as a function of the back gate voltage (V B ) when different pH buffer solutions are probed in the range of pH 6 to pH 8 This shift is observed at V B voltages swept from 0 V to 3 V, demonstrating the sensor operation at low voltage A high sensitivity of up to 250 mV/pH unit (more than 4-fold larger than Nernstian response) is observed on FDSOI MOS transistors of 006 µm gate length and 008 µm gate width
6 citations
TL;DR: In this paper, the authors present a versatile nanodamascene process for the realization of low-power nanoelectronic devices with different oxide junctions, which is fully compatible with CMOS back-end-ofline and is used for monolithic 3D integration.
Abstract: We present a versatile nanodamascene process for the realization of low-power nanoelectronic devices with different oxide junctions. With this process we have fabricated metal/insulator/metal junctions, metallic single electron transistors, silicon tunnel field effect transistors, and planar resistive memories. These devices do exploit one or two nanometric-scale tunnel oxide junctions based on TiO2, SiO2, HfO2, Al2O3, or a combination of those. Because the nanodamascene technology involves processing temperatures lower than 300&#-80;C, this technology is fully compatible with CMOS back-end-of-line and is used for monolithic 3D integration.
6 citations
01 May 2017
TL;DR: In this article, the authors demonstrate combined humidity, strain and temperatures sensors based on a carbon nanotube mesh embedded in apolyimide matrix and further demonstrate that an array of micro-humidity(/strain/temperature) sensors can be integrated at the wafer finish step of semiconductor chips to provide usefulin-situ real-time information.
Abstract: Lifetime reliability of electronics package is importantfor long term operation of microelectronic devices. Humidity, temperature and resulting strain are three mainreasons for the failure of a flip-chip semiconductor package. For these reasons, continuous research effort have been devotedto integrate moisture, temperature and strain sensorsin package performance and failure risk monitoring. Wehere demonstrate combined humidity, strain and temperaturesensors based on a carbon nanotube mesh embedded in apolyimide matrix. We further demonstrate that an array ofmicro-humidity(/strain/temperature) sensors can be integratedat the wafer finish step of semiconductor chips to provide usefulin-situ real-time information.
5 citations
TL;DR: In this article, a method of simulating metallic island single electron transistors (SETs) and small circuits which speeds up the design-fabrication-characterization cycle is proposed.
Abstract: A method of simulating metallic-island single electron transistors (SETs) and small circuits which speeds up the design-fabrication-characterization cycle is proposed. The method combines finite-elements method to extract device capacitance matrix and standard master equations solved by Monte Carlo to simulate device transport characteristics based on the fabrication geometry and materials. It allows simulation of SET circuits. The simulation method is detailed using two capacitively coupled SETs acting either as an electron box or a sensor. The method is also compared with isolated SETs fabricated using the nanodamascene process and characterized at low temperatures. Experimental devices show clear Coulomb blockade diamonds at 1.5 K and charging energies up to 3 meV. The simulation platform predicts the electrical behavior accurately with minimal fitting parameters. This method allows rapid and accurate design iterations before costly fabrication.
4 citations
01 Sep 2017
TL;DR: By integrating aluminum oxide (Al2O3) for the pH sensing purpose, the proof of concept of a new extended-gate pH sensor is reported, having a sensitivity of 475 mV/pH, which is superior to state-of-the-art low-power ISFETs.
Abstract: The proof of concept of a new extended-gate pH sensor, developed on an industrial ultrathin body and buried oxide (UTBB) fully-depleted silicon-on-insulator (FDSOI) transistor, is reported. The strong electrostatic coupling between the front gate and back gate of UTBB FDSOI devices provide a signal amplification opportunity for sensing applications. On the other hand, the biasing capability through a capacitive divider circuit of a floating gate ISFET offers an ample advantage for fabrication of stable and CMOS compatible solid state chemical sensors. In addition, the deep downscaling of the state-of-the-art devices enables it to be sensitive at single-charge-resolution. By integrating aluminum oxide (Al 2 O 3 ) for the pH sensing purpose, we obtained an extended-gate mode ISFET having a sensitivity of 475 mV/pH, which is superior to state-of-the-art low-power ISFETs.
3 citations
01 Jun 2017
TL;DR: In this paper, the morphology and electrical resistivity of quasi-monocrystalline germanium (QMC Ge) were investigated for potential applications in high-efficiency, low-cost multi-junction solar cell design.
Abstract: Quasi-monocrystalline germanium (QMC Ge) is investigated for potential applications in high-efficiency, low-cost multi-junction solar cell design. The morphology and electrical resistivity of QMC Ge is characterized and computer simulations of MJSCs on Si substrates using QMC Ge interface layer are developed.
1 citations