Thin TiO2 films are demonstrated to be an excellent electron-selective contact for crystalline silicon solar cells. An efficiency of 21.6% is achieved for crystalline silicon solar cells featuring a full-area TiO2 -based electron-selective contact.

High-Performance TiO2 -Based Electron-Selective Contacts for Crystalline Silicon Solar Cells.

Solar-assisted water splitting can potentially provide an efficient route for large-scale renewable energy conversion and storage. It is essential for such a system to provide a sufficiently high photocurrent and photovoltage to drive the water oxidation reaction. Here we demonstrate a photoanode that is capable of achieving a high photovoltage by engineering the interfacial energetics of metal-insulator-semiconductor junctions. We evaluate the importance of using two metals to decouple the functionalities for a Schottky contact and a highly efficient catalyst. We also illustrate the improvement of the photovoltage upon incidental oxidation of the metallic surface layer in KOH solution. Additionally, we analyse the role of the thin insulating layer to the pinning and depinning of Fermi level that is responsible to the resulting photovoltage. Finally, we report the advantage of using dual metal overlayers as a simple protection route for highly efficient metal-insulator-semiconductor photoanodes by showing over 200 h of operational stability.

Interfacial engineering of metal-insulator-semiconductor junctions for efficient and stable photoelectrochemical water oxidation.

The difficulty in Schottky barrier height (SBH) control arising from Fermi-level pinning (FLP) at electrical contacts is a bottleneck in designing high-performance nanoscale electronics and optoelectronics based on molybdenum disulfide (MoS2). For electrical contacts of multilayered MoS2, the Fermi level on the metal side is strongly pinned near the conduction-band edge of MoS2, which makes most MoS2-channel field-effect transistors (MoS2 FETs) exhibit n-type transfer characteristics regardless of their source/drain (S/D) contact metals. In this work, SBH engineering is conducted to control the SBH of electrical top contacts of multilayered MoS2 by introducing a metal–interlayer–semiconductor (MIS) structure which induces the Fermi-level unpinning by a reduction of metal-induced gap states (MIGS). An ultrathin titanium dioxide (TiO2) interlayer is inserted between the metal contact and the multilayered MoS2 to alleviate FLP and tune the SBH at the S/D contacts of multilayered MoS2 FETs. A significant alle...

Schottky Barrier Height Engineering for Electrical Contacts of Multilayered MoS2 Transistors with Reduction of Metal-Induced Gap States

The work presented in this publication was supported by King Abdullah University of Science and Technology (KAUST), through the Competitive Research Grant. Research performed at the Australian National University was supported by the Australian Government through the Australian Research Council (Discovery Project: DP150104331).

Tantalum Nitride Electron-Selective Contact for Crystalline Silicon Solar Cells

Recent advances in the efficiency of crystalline silicon (c-Si) solar cells have come through the implementation of passivated contacts that simultaneously reduce recombination and resistive losses within the contact structure. In this contribution, low resistivity passivated contacts are demonstrated based on reduced titania (TiOx) contacted with the low work function metal, calcium (Ca). By using Ca as the overlying metal in the contact structure we are able to achieve a reduction in the contact resistivity of TiOx passivated contacts of up to two orders of magnitude compared to previously reported data on Al/TiOx contacts, allowing for the application of the Ca/TiOx contact to n-type c-Si solar cells with partial rear contacts. Implementing this contact structure on the cell level results in a power conversion efficiency of 21.8% where the Ca/TiOx contact comprises only ≈6% of the rear surface of the solar cell, an increase of 1.5% absolute compared to a similar device fabricated without the TiOx interlayer.

A Low Resistance Calcium/Reduced Titania Passivated Contact for High Efficiency Crystalline Silicon Solar Cells

Experimental evidence of reduction of ultrathin TiO2 by Ti is presented and its effect on Fermi level depinning and contact resistivity reduction to Si is experimentally studied. A low effective barrier height of 0.15 V was measured with a Ti/10 A TiO2−x/n-Si MIS device, indicating 55% reduction compared to a metal/n-Si control contact. Ultra-low contact resistivity of 9.1 × 10−9 Ω-cm2 was obtained using Ti/10 A TiO2−x/n+ Si, which is a dramatic 13X reduction from conventional unannealed contacts on heavily doped Si. Transport through the MIS device incorporating the effect of barrier height reduction and insulator conductivity as a function of insulator thickness is comprehensively analyzed and correlated with change in contact resistivity. Low effective barrier height, high substrate doping, and high conductivity interfacial layer are identified as key requirements to obtain low contact resistivity using MIS contacts.

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Fermi level depinning and contact resistivity reduction using a reduced titania interlayer in n-silicon metal-insulator-semiconductor ohmic contacts

Strain technology has been a key enabler for improving transistor performance in the past decade. Recently a question has arisen whether stressors will maintain their effectiveness with continued reduction in stressor volume as transistor pitch scales. Also which stressors will be most effective as the industry moves from planar to FinFET transistors? In this paper we present a holistic view on scalability of strain technology. TCAD models are calibrated with experimental data to project the scalability. Figure 1 highlights the key differences in strain engineering moving from planar to FinFET devices. Depth profile of stress, additional transverse stress due to metal fills for contact and gate stack which wrap around the fin and stress response along different surface orientation becomes important (Table.1) as transport now happens along the sidewalls vs. just the top surface. In this paper we study the effect of (a) S/D epitaxy : SiGe for PMOS and Si:C for NMOS (b) Gate metal fill which wraps around the fin (e.g. TiN/W fill) (c) Metal fill for the trench contact (e.g. W) and (d) STI fill (Figure 2). Stress from etch stop liner is known to be not effective in FinFET architecture [1–2] and is not examined in this study.

Is strain engineering scalable in FinFET era?: Teaching the old dog some new tricks

We demonstrate electrically functional 0.099µm2 6T-SRAM cells using full-field EUV lithography for contact and M1 levels. This enables formation of dense arrays without requiring any OPC/RET, while exhibiting substantial process latitudes & potential lower cost of ownership (single-patterning). Key enablers include: 1) high-k/metal gate FinFETs with L g ∼40nm, 12–17nm wide Fins, and cell β ratio ∼1.3; 2) option for using an extension-less approach, advantageous for reducing complexity with 2 less I/I photos, and for enabling a better quality, defect-free growth of Si-epitaxial raised S/D; 3) use of double thin-spacers and ultra-thin silicide; 4) optimized W metallization for filling high aspect-ratio, ≥30nm-wide contacts. SRAM cell with SNM≫10%V DD down to 0.4V, and healthy electrical characteristics for the cell transistors [SS∼80mV/dec, DIBL∼50–80mV/V, and |V Tlin |≤0.2V (PMOS), V Tlin ∼0.36V (NMOS)] are reported.

Jerry Gelatos

Papers

Fermi level depinning and contact resistivity reduction using a reduced titania interlayer in n-silicon metal-insulator-semiconductor ohmic contacts

Is strain engineering scalable in FinFET era?: Teaching the old dog some new tricks

Demonstration of scaled 0.099µm 2 FinFET 6T-SRAM cell using full-field EUV lithography for (Sub-)22nm node single-patterning technology