J
Jiaw-Ren Shih
Researcher at National Tsing Hua University
Publications - 15
Citations - 184
Jiaw-Ren Shih is an academic researcher from National Tsing Hua University. The author has contributed to research in topics: Layer (electronics) & CMOS. The author has an hindex of 7, co-authored 15 publications receiving 175 citations. Previous affiliations of Jiaw-Ren Shih include TSMC.
Papers
More filters
Patent
STI process for improving isolation for deep sub-micron application
TL;DR: In this paper, a new method is provided for the creation of a Shallow Trench Isolation region, where a layer of pad oxide and nitride are patterned and etched over the region where the STI is to be formed.
Patent
Plasma damage protection cell using floating N/P/N and P/N/P structure
TL;DR: In this paper, a plasma damage protection cell using floating N/P/N and P/N/P structure is presented. But the method to form the same is not described.
Patent
Integration method for deep sub-micron dual gate transistor design
TL;DR: In this paper, a gate pocket implantation and post-processing sequence that allows for the creation of a deep and narrow pocket implant without affecting gate threshold voltage and the integrity of the gate oxide layer is presented.
Patent
Channel stop ion implantation method for CMOS integrated circuits
TL;DR: In this paper, a method for incorporating an ion implanted channel stop layer under field isolation for a twin-well CMOS process is described in which the layer is placed directly under the completed field isolation by a blanket boron ion implant over the whole wafer.
Journal ArticleDOI
A Novel 2-Bit/Cell p-Channel Logic Programmable Cell With Pure 90-nm CMOS Technology
Ying-Je Chen,Chia-En Huang,Hsin-Ming Chen,Han-Chao Lai,Jiaw-Ren Shih,K. Wu,Ya-Chin King,Chrong Jung Lin +7 more
TL;DR: In this paper, a p-channel nitride-based one-time programmable (OTP) memory was developed for advanced-logic nonvolatile memory (NVM) applications.