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Design Of Analog Cmos Integrated Circuits

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Detection, Estimation, and Modulation Theory

VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon)

When it comes to integratability, the zero-intermediate frequency (IF) receiver is an alternative for the heterodyne or IF receiver. In recent years, the zero-IF receiver has been introduced in several applications, but its performance cannot be compared to that of the IF receiver yet. This lower performance is closely related to its baseband operation, resulting in filter saturation and distortion, both caused by DC-offsets and self-mixing at the inputs of the mixers. The low-IF receiver has a topology which is closely related to the zero-IF receiver, but it does not operate in the baseband, only near the baseband. The consequences are that, as for the zero-IF receiver, the implementation of a low-IF receiver can be done with a high degree of integration, however, its performance can be better. In this paper, the fundamental principles of the low-IF receiver topology are introduced. Different low-IF receiver topologies are synthesized and fully analyzed in this paper. This is done by applying the complex signal technique-a technique used in digital applications to the study of analog receiver front ends.

Low-IF topologies for high-performance analog front ends of fully integrated receivers

Direct-conversion microwave Doppler radar can be used to detect cardiopulmonary activity at a distance. One challenge for such detection in single channel receivers is demodulation sensitivity to target position, which can be overcome by using a quadrature receiver. This paper presents a mathematical analysis and experimental results demonstrating the effectiveness of arctangent demodulation in quadrature receivers. A particular challenge in this technique is the presence of dc offset resulting from receiver imperfections and clutter reflections, in addition to dc information related to target position and associated phase. These dc components can be large compared to the ac motion-related signal, and thus, cannot simply be included in digitization without adversely affecting resolution. Presented here is a method for calibrating the dc offset while preserving the dc information and capturing the motion-related signal with maximum resolution. Experimental results demonstrate that arctangent demodulation with dc offset compensation results in a significant improvement in heart rate measurement accuracy over quadrature channel selection, with a standard deviation of less than 1 beat/min

Arctangent Demodulation With DC Offset Compensation in Quadrature Doppler Radar Receiver Systems

This paper presents a voltage-mode high speed driver to transmit serial AER data in scalable multi-chip AER systems. To take advantage of the asynchronous nature of AER (Address Event Representation) streams, this implementation allows an energy efficient burst-mode operation. This is achieved by switching on/off the driver in data pauses to reduce static power consumption. Impedance matching is calibrated continuously to track temperature variations, obtaining an optimal performance without degrading the data rate. Power management techniques for switching drivers are discussed and an internally compensated high speed regulator is presented. The system has been designed in a 0.35µm CMOS technology to transmit data rates up to 500Mbps using Manchester enconding. Layout extracted simulation results are presented, which include all interconnect parasitics. Estimated peak rate is 15Meps for 32 bit events. Simulated power consumption of transmitter and receiver at peak rate is 33.2mW, while below 100 Keps is 1.3mW.

Voltage mode driver for low power transmission of high speed serial AER Links

This paper deals with the design of high-performance OTA-C continuous-time filters. The fundamental limits of both noise level and Total Harmonic Distortion (THD) are further studied. In order to reduce the THD, several linear voltage to current transducers are discussed. These techniques allow the design high-performance filters; e.g. -60 dB total harmonic distortion for input signals up to 2 volts peak to peak. Experimental results are reported.

Dynamic range limitations in linear OTA-based low-voltage continuous-time filters

In the above titled paper (ibid., vol. 58, no. 3, pp. 507-520, Mar. 2011), important missing references [2]-[5] that represent fundamental background material on compressive sensing should have been added to the reference list and included within the second paragraph of the introduction (Section I) that cites [15] and [16] in the original reference list.

Corrections to “A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing” [Mar 11 507-520]

A four quadrant analogue multiplier, an activation function and a differentiator intended for the implementation of backpropagation algorithms are proposed. The priorities for the design are low-power, low-voltage, and minimum silicon area. Breadboard results, showing good agreement with the theoretical ones, are reported.

Compact building blocks for artificial neural networks

This paper presents a complete top-down design and experimental results for a fast-hopping 11-band 3-10-GHz frequency synthesizer. The system requirements for a synthesizer in an ultrawideband (UWB) radio are discussed. The synthesizer specifications for 480-Mb/s- and 1-Gb/s-data-rate multiband orthogonal-frequency-division-multiplexing UWB radios using quadrature phase shift keying and 16-quadrature amplitude modulation, respectively, are provided. The circuit-level implementation of this microwave system is described in detail including layout considerations. Fabricated in a 0.25-mum SiGe BiCMOS process and integrated in a receiver, the synthesizer was characterized in a quad-flat-no-leads package while being mounted on an FR-4 substrate. Measurement results and a model-hardware correlation analysis are presented.

Jose Silva-Martinez

Papers

Voltage mode driver for low power transmission of high speed serial AER Links

Dynamic range limitations in linear OTA-based low-voltage continuous-time filters

Corrections to “A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing” [Mar 11 507-520]

Compact building blocks for artificial neural networks

System and Circuit Design for an MB-OFDM UWB Frequency Synthesizer