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Runsheng Wang

Researcher at Peking University

Publications -  268
Citations -  2578

Runsheng Wang is an academic researcher from Peking University. The author has contributed to research in topics: Computer science & MOSFET. The author has an hindex of 23, co-authored 217 publications receiving 1940 citations.

Papers
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Proceedings ArticleDOI

Study of low frequency noise behavior in silicon nanowire transistors fabricated with top-to-down approach

TL;DR: In this paper, a correlated-mobility fluctuation model can explain the LFN behavior at low drain current, while significant noise enhancement is observed at high current region due to the impact of parasitic resistance of the ultra-narrow SDE regions in the nanowire transistors.
Journal ArticleDOI

HybridNet: Dual-Branch Fusion of Geometrical and Topological Views for VLSI Congestion Prediction

TL;DR: HybridNet as mentioned in this paper constructs two individual graphs (geometry-graph, topology-graph) with distinct edge construction schemes according to their unique properties, and then proposes a dual-branch network with different encoder layers in each pathway and aggregate representations with a sophisticated fusion strategy.
Patent

Preparation method for semiconductor nano ring

TL;DR: In this paper, a positive photoresist is coated on a semiconductor substrate, then exposed by means of a circular mask having a micron-grade diameter to obtain ring shaped photoresists and then plasma etching is carried out on the substrate under the protection of the ring-shaped photoresis to form a ring shape with nano-sized wall thickness on the surface of the substrate.
Proceedings ArticleDOI

Accurate and Energy-Efficient Implementation of Non-Linear Adder in Parallel Stochastic Computing using Sorting Network

TL;DR: Based on a special type of stochastic encoding, the parallel thermometer coding, an accurate design for the combination of the accumulation and non-linear function, which is called a nonlinear adder is proposed, which achieves more than three orders of magnitude improvement in accuracy and at least 44.5× energy consumption reduction compared with the traditional designs.
Journal ArticleDOI

On the Understanding of Defects in Short-Term Negative Bias Temperature Instability (NBTI) for Sub-20-nm DRAM Technology

TL;DR: In this article , a short-term Negative Bias Temperature Instability (NBTI) was investigated in sub-20-nm DRAM technology by using Variable Amplitude Charge Pumping measurement.