S
Souvik Mahapatra
Researcher at Indian Institute of Technology Bombay
Publications - 242
Citations - 6126
Souvik Mahapatra is an academic researcher from Indian Institute of Technology Bombay. The author has contributed to research in topics: Negative-bias temperature instability & Gate oxide. The author has an hindex of 35, co-authored 228 publications receiving 5472 citations. Previous affiliations of Souvik Mahapatra include Indian Institutes of Technology & Alcatel-Lucent.
Papers
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Journal ArticleDOI
Investigation and modeling of interface and bulk trap generation during negative bias temperature instability of p-MOSFETs
TL;DR: In this article, the relative contributions of interface- and bulk-trap generation to this device degradation mode are analyzed for a wide range of stress bias and stress temperature, as well as those of inversion layer holes, impact ionized hot holes, and hot electrons on interface and bulk trap generation, are identified.
Journal ArticleDOI
On the generation and recovery of interface traps in MOSFETs subjected to NBTI, FN, and HCI stress
TL;DR: In this paper, a common framework for interface-trap (NIT) generation involving broken equivSi-H and equiv Si-O bonds is developed for negative bias temperature instability (NBTI), Fowler-Nordheim (FN), and hot-carrier injection (HCI) stress.
Proceedings ArticleDOI
On the Physical Mechanism of NBTI in Silicon Oxynitride p-MOSFETs: Can Differences in Insulator Processing Conditions Resolve the Interface Trap Generation versus Hole Trapping Controversy?
Souvik Mahapatra,Khaled Ahmed,Dhanoop Varghese,Ahmad E. Islam,Gautam Gupta,L. Madhav,Dipankar Saha,Muhammad A. Alam +7 more
TL;DR: In this article, negative bias temperature instability (NBTI) was studied in thin and thick PNO and thin TNO Si-oxynitride devices having varying EOT.
Proceedings ArticleDOI
On the dispersive versus arrhenius temperature activation of nbti time evolution in plasma nitrided gate oxides: measurements, theory, and implications
TL;DR: In this paper, negative bias temperature instability (NBTI) was studied in p-MOSFETs having decoupled plasma nitrided (DPN) gate oxides (EOT range of 12 Aring through 22Aring).
Proceedings ArticleDOI
A critical re-evaluation of the usefulness of R-D framework in predicting NBTI stress and recovery
TL;DR: In this paper, the reaction-diffusion framework for interface trap generation along with hole trapping in pre-existing and generated bulk oxide traps are used to model Negative Bias Temperature Instability (NBTI) in differently processed SiON p-MOSFETs.