S
Srivatsa Srinivasa
Researcher at Pennsylvania State University
Publications - 25
Citations - 361
Srivatsa Srinivasa is an academic researcher from Pennsylvania State University. The author has contributed to research in topics: Static random-access memory & NAND gate. The author has an hindex of 9, co-authored 24 publications receiving 205 citations. Previous affiliations of Srivatsa Srinivasa include Intel.
Papers
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Journal ArticleDOI
Back-End-of-Line Compatible Transistors for Monolithic 3-D Integration
TL;DR: Recent progress in the selection and optimization of semiconductor materials for BEOL compatible transistors to enable sequential M3D integration for a range of applications is discussed.
Journal ArticleDOI
Influence of Body Effect on Sample-and-Hold Circuit Design Using Negative Capacitance FET
Yuhua Liang,Xueqing Li,Sumitha George,Srivatsa Srinivasa,Zhangming Zhu,Sumeet Kumar Gupta,Suman Datta,Vijaykrishnan Narayanan +7 more
TL;DR: In this paper, the impact of body effect on an NCFET-based bootstrapped switch and illustrate that the linearity of the switch can be improved due to internal amplification of the employed negative capacitance FET.
Proceedings ArticleDOI
Spendthrift: Machine learning based resource and frequency scaling for ambient energy harvesting nonvolatile processors
Kaisheng Ma,Xueqing Li,Srivatsa Srinivasa,Yongpan Liu,Jack Sampson,Yuan Xie,Vijaykrishnan Narayanan +6 more
TL;DR: This paper examines two approaches, frequency scaling and resource scaling, and develops a predictor-driven scheme for dynamically allocating future power budgets between the two techniques, and shows that the combined technique outperforms either technique in isolation.
Proceedings ArticleDOI
Look-Up Table based Energy Efficient Processing in Cache Support for Neural Network Acceleration
Akshay Krishna Ramanathan,Kalsi Gurpreet S,Srivatsa Srinivasa,Tarun Makesh Chandran,Pillai Kamlesh R,Omer Om J,Vijaykrishnan Narayanan,Sreenivas Subramoney +7 more
TL;DR: This paper presents a Look-Up Table (LUT) based Processing-In-Memory (PIM) technique with the potential for running Neural Network inference tasks and implements a bitline computing free technique to avoid frequent bitline accesses to the cache sub-arrays and thereby considerably reducing the memory access energy overhead.
Proceedings ArticleDOI
TSV-free FinFET-based Monolithic 3D + -IC with computing-in-memory SRAM cell for intelligent IoT devices
Fu-Kuo Hsueh,Hsiao-Yun Chiu,Chang-Hong Shen,Jia-Min Shieh,Ying-Tsan Tang,Chih-Chao Yang,Hsiu-Chih Chen,Wen-Hsien Huang,Bo-Yuan Chen,Kun-Ming Chen,Guo-Wei Huang,Wei-Hao Chen,K. C. Hsu,Srivatsa Srinivasa,Nicholas Jao,Albert Lee,Hochul Lee,Vijaykrishnan Narayanan,Kang-Lung Wang,Meng-Fan Chang,Wen-Kuan Yeh +20 more
TL;DR: In this article, the authors presented the first monolithic 3D vertical cross-tier computing-in-memory (CIM) SRAM cell fabricated using low cost TSV-free FinFET-based 3D+-IC technology.