V
Vincent Huard
Researcher at STMicroelectronics
Publications - 156
Citations - 3952
Vincent Huard is an academic researcher from STMicroelectronics. The author has contributed to research in topics: Negative-bias temperature instability & CMOS. The author has an hindex of 27, co-authored 154 publications receiving 3688 citations. Previous affiliations of Vincent Huard include Philips & NXP Semiconductors.
Papers
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Journal ArticleDOI
NBTI degradation: From physical mechanisms to modelling
TL;DR: An overview of the evolution of transistor parameters under negative bias temperature instability stress conditions commonly observed in p-MOSFETs in recent technologies is presented and a physical model is proposed which could be used to more accurately predict the transistor degradation.
Proceedings ArticleDOI
28nm FDSOI technology platform for high-speed low-voltage digital applications
Nicolas Planes,Olivier Weber,V. Barral,Sebastien Haendler,D. Noblet,D. Croain,M. Bocat,P.O. Sassoulas,Xavier Federspiel,Antoine Cros,A. Bajolet,E. Richard,B. Dumont,Pierre Perreau,David Petit,Dominique Golanski,Claire Fenouillet-Beranger,N. Guillot,Mustapha Rafik,Vincent Huard,S. Puget,X. Montagner,M-A. Jaud,O. Rozeau,O. Saxod,Francois Wacquant,Frederic Monsieur,D. Barge,L. Pinzelli,M. Mellier,Frederic Boeuf,Franck Arnaud,Michel Haond +32 more
TL;DR: This work demonstrates 32% and 84% speed boost at 1.0V and 0.6V respectively, without adding process complexity compared to standard bulk technology, to show how memory access time can be significantly reduced thanks to high Iread, by keeping competitive leakage values.
Proceedings ArticleDOI
On-the-fly characterization of NBTI in ultra-thin gate oxide PMOSFET's
M. Denais,C. Parthasarathy,G. Ribes,Y. Rey-Tauriac,N. Revil,Alain Bravaix,Vincent Huard,F. Perrier +7 more
TL;DR: In this article, a new methodology was proposed to characterize the negative bias temperature instability (NBTI) degradation without inherent recovery, and the extracted parameters are the linear drain current, the threshold voltage and the transconductance.
Proceedings ArticleDOI
Two independent components modeling for Negative Bias Temperature Instability
TL;DR: In this article, the Negative Bias Temperature Instability is made of two independent components, presenting different voltage and temperature acceleration factors as well as process dependences, and the recoverable part obeys field-assisted LRME hole trapping/detrapping processes.
Proceedings ArticleDOI
NBTI degradation: From transistor to SRAM arrays
Vincent Huard,Chittoor Parthasarathy,C. Guerin,T. Valentin,E. Pion,M. Mammasse,Nicolas Planes,L. Camus +7 more
TL;DR: In this paper, a composite model was proposed to physically explain the mean pMOS threshold voltage shift induced by NBTI degradation at transistor level in a quantitative way, which was extended to include the statistical variations introduced by intrinsic fluctuations.