V
V. Barral
Publications - 21
Citations - 872
V. Barral is an academic researcher. The author has contributed to research in topics: Silicon on insulator & Transistor. The author has an hindex of 12, co-authored 21 publications receiving 731 citations.
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Proceedings ArticleDOI
28nm FDSOI technology platform for high-speed low-voltage digital applications
Nicolas Planes,Olivier Weber,V. Barral,Sebastien Haendler,D. Noblet,D. Croain,M. Bocat,P.O. Sassoulas,Xavier Federspiel,Antoine Cros,A. Bajolet,E. Richard,B. Dumont,Pierre Perreau,David Petit,Dominique Golanski,Claire Fenouillet-Beranger,N. Guillot,Mustapha Rafik,Vincent Huard,S. Puget,X. Montagner,M-A. Jaud,O. Rozeau,O. Saxod,Francois Wacquant,Frederic Monsieur,D. Barge,L. Pinzelli,M. Mellier,Frederic Boeuf,Franck Arnaud,Michel Haond +32 more
TL;DR: This work demonstrates 32% and 84% speed boost at 1.0V and 0.6V respectively, without adding process complexity compared to standard bulk technology, to show how memory access time can be significantly reduced thanks to high Iread, by keeping competitive leakage values.
Proceedings ArticleDOI
Novel integration process and performances analysis of Low STandby Power (LSTP) 3D multi-channel CMOSFET (MCFET) on SOI with metal / high-K gate stack
E. Bernard,Thomas Ernst,Bernard Guillaumot,Nathalie Vulliet,V. Barral,V. Maffini-Alvaro,Francois Andrieu,C. Vizioz,Y. Campidelli,P. Gautier,J.M. Hartmann,R. Kies,Vincent Delaye,F. Aussenac,Thierry Poiroux,Philippe Coronel,Abdelkader Souifi,Thomas Skotnicki,Simon Deleonibus +18 more
TL;DR: In this article, a multi-channel MCFET architecture with a metal/high-K gate stack is presented, which achieves ultra low IOFF (16.5 pA/mum) and high IONN,P (2.27 mA /mm) currents for 50 nm n-p-MCFETs.
Proceedings ArticleDOI
Strained FDSOI CMOS technology scalability down to 2.5nm film thickness and 18nm gate length with a TiN/HfO 2 gate stack
V. Barral,Thierry Poiroux,Francois Andrieu,C. Buj-Dufournet,O. Faynot,Thomas Ernst,L. Brevard,C. Fenouillet-Beranger,D. Lafond,J.M. Hartmann,V. Vidal,F. Allain,Nicolas Daval,Ian Cayrefourcq,L. Tosti,Daniela Munteanu,J.L. Autran,Simon Deleonibus +17 more
TL;DR: In this paper, the authors explored the scalability of both unstrained and strained FDSOI CMOSFETs down to 2.5 nm film thickness and 18 nm gate length with HfO2/TiN gate stack.
Journal ArticleDOI
Cryogenic Subthreshold Swing Saturation in FD-SOI MOSFETs described with Band Broadening
H. Bohuslavskyi,A. G. M. Jansen,S. Barraud,V. Barral,Mikael Casse,L. Le Guevel,Xavier Jehl,Louis Hutin,Benoit Bertrand,Gerard Billiot,Gael Pillonnet,Franck Arnaud,Philippe Galy,S. De Franceschi,M. Vinet,Marc Sanquer +15 more
TL;DR: In this article, the authors present and analyze the saturation of 28nm fully-depleted silicon-on-insulator (FD-SOI) devices for both n and p-type MOSFETs of different gate oxide thicknesses and gate lengths down to 4K.
Proceedings ArticleDOI
Truly Innovative 28nm FDSOI Technology for Automotive Micro-Controller Applications embedding 16MB Phase Change Memory
Franck Arnaud,Paola Zuliani,J. P. Reynard,A. Gandolfo,F. Disegni,Paolo Mattavelli,Enrico Gomiero,G. Samanni,C. Jahan,R. Berthelon,Olivier Weber,E. Richard,V. Barral,Alexandre Villaret,S. Kohler,J. C. Grenier,R. Ranica,C. Gallon,A. Souhaite,D. Ristoiu,L. Favennec,V. Caubet,S. Delmedico,N. Cherault,Remi Beneyton,S. Chouteau,P.O. Sassoulas,A. Vernhet,Y. Le Friec,Florian Domengie,L. Scotti,D. Pacelli,Jean-Luc Ogier,F. Boucard,S. Lagrasta,Daniel Benoit,L. Clement,Philippe Boivin,Paulo Ferreira,Roberto Annunziata,Paolo Cappelletti +40 more
TL;DR: For the first time, a 28nm FDSOI e-NVM solution for automotive micro-controller applications using a Phase Change Memory (PCM) based on chalcogenide ternary material is proposed and a true 5V transistor with high analog performance has been demonstrated.