Yo-Chuol Ho

TL;DR: In this paper, the authors present a single-chip fully compliant Bluetooth radio fabricated in a digital 130-nm CMOS process, which is compatible with digital deep-submicron CMOS processes and can be readily integrated with a digital baseband and application processor.

TL;DR: A discrete-time receiver architecture for a wireless application is presented and analog signal processing concepts are used to directly sample the RF input at Nyquist rate.

TL;DR: The receiver in the first single-chip GSM/GPRS transceiver that incorporates full integration of quad-band receiver, transmitter, memory, power management, dedicated ARM processor and RF built-in self test in a 90-nm digital CMOS process is presented.

TL;DR: In this article, a low noise amplifier (LNA) with output matching that can be tuned by an adjustable inductor together with a tunable capacitor bank is presented, which operates over multiple frequency bands while occupying less silicon area than known LNA implementations.

TL;DR: The RF transceiver is built on the Digital RF Processor (DRP) technology, and the ADPLL-based transmitter uses a polar architecture with all-digital PM-FM and AM paths.