Proceedings ArticleDOI
A discrete-time Bluetooth receiver in a 0.13/spl mu/m digital CMOS process
Khurram Muhammad,Dirk Leipold,Bogdan Staszewski,Yo-Chuol Ho,Chih-Ming Hung,Kenneth J. Maggio,C. Fernando,T. Jung,John Wallberg,Jinseok Koh,S. John,I. Deng,O. Moreira,Robert Bogdan Staszewski,Ran Katz,Ofer Friedman +15 more
- pp 268-527
TLDR
A discrete-time receiver architecture for a wireless application is presented and analog signal processing concepts are used to directly sample the RF input at Nyquist rate.Abstract:
A discrete-time receiver architecture for a wireless application is presented. Analog signal processing concepts are used to directly sample the RF input at Nyquist rate. Maximum receiver sensitivity is -83dBm and the chip consumes a total of 41mA from a 1.575V internally regulated supply. The receiver is implemented in a 0.13/spl mu/m digital CMOS process.read more
Citations
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Journal ArticleDOI
All-digital PLL and transmitter for mobile phones
Robert Bogdan Staszewski,John Wallberg,Sameh S. Rezeq,Chih-Ming Hung,Oren Eliezer,Sudheer Vemulapalli,C. Fernando,Kenneth J. Maggio,Robert B. Staszewski,N. Barton,Meng-Chang Lee,P. Cruise,Manouchehr Entezari,Khurram Muhammad,Dirk Leipold +14 more
TL;DR: The first all-digital PLL and polar transmitter for mobile phones is presented, exploiting the new paradigm of a deep-submicron CMOS process environment by leveraging on the fast switching times of MOS transistors, the fine lithography and the precise device matching, while avoiding problems related to the limited voltage headroom.
Journal ArticleDOI
All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS
Robert Bogdan Staszewski,Khurram Muhammad,Dirk Leipold,Chih-Ming Hung,Yo-Chuol Ho,John Wallberg,C. Fernando,Ken Maggio,Roman Staszewski,T. Jung,Jinseok Koh,S. John,I. Deng,Vivek Sarda,O. Moreira-Tamayo,Valerian Mayega,Ran Katz,Ofer Friedman,Oren Eliezer,Elida de-Obaldia,Poras T. Balsara +20 more
TL;DR: In this paper, the authors present a single-chip fully compliant Bluetooth radio fabricated in a digital 130-nm CMOS process, which is compatible with digital deep-submicron CMOS processes and can be readily integrated with a digital baseband and application processor.
Journal ArticleDOI
An Energy-Efficient OOK Transceiver for Wireless Sensor Networks
TL;DR: A 1-Mb/s 916.5-MHz on-off keying transceiver for short-range wireless sensor networks has been designed in a 0.18-mum CMOS process with an envelope detection based architecture with a highly scalable RF front-end.
Journal ArticleDOI
RF CMOS comes of age
TL;DR: In this paper, a retrospective and a perspective of RF CMOS is presented, including its origins, the commercial impact, and how it will evolve in the future, as well as a discussion of the current state of the art.
Journal ArticleDOI
Transceiver architecture selection: Review, state-of-the-art survey and case study
TL;DR: © P H O T O D IS C A N D C R E A TA S Feature
References
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Proceedings ArticleDOI
A fully-integrated single-chip SOC for Bluetooth
Frank Op’t Eynde,J.-J. Schmit,V. Charlier,R. Alexandre,C. Sturman,K. Coffin,B. Mollekens,Jan Craninckx,S. Terrijn,A. Monterastelli,S. Beerens,P. Goetschalckx,Mark Ingels,D. Joos,S. Guncer,A. Pontioglu +15 more
TL;DR: A 0.25 /spl mu/m CMOS IC contains all analog and digital electronics required for a point-to-multipoint Bluetooth node and has 15 dB noise figure and 2 dBm maximum transmitter output.
Proceedings ArticleDOI
A direct-conversion single-chip radio-modem for bluetooth
Glenn Chang,L. Jansson,Kevin Wang,J. Grilo,Raymond Montemayor,Christopher D. Hull,Mark Vernon Lane,Andrew Xavier Estrada,M. Anderson,Ian Galton,S.V. Kishore +10 more
TL;DR: A fully-integrated radio-modem using a direct-conversion receiver architecture achieves -83 dBm sensitivity at 0.1% BER, +40 dBm IIP2, and -5 dB and -40 dB adjacent and alternate channel blocking C/I, respectively.