Yu-Hsiu Chen

TL;DR: In this paper, a novel HfO2-based resistive memory with the TiN electrodes is proposed and fully integrated with 0.18 mum CMOS technology, which uses a thin Ti layer as the reactive buffer layer into the anodic side of capacitor-like memory cell, and excellent memory performances such as low operation current (down to 25 muA), high on/off resistance ratio (above 1,000), fast switching speed (5 ns), satisfactory switching endurance (>106 cycles) have been demonstrated in the memory device.

TL;DR: In this article, a modified bottom electrode is proposed for the memory device to maintain the memory window and to endure resistive switching up to 1010 cycles, and the performance of the HfO X-based bipolar resistive memory was improved.

TL;DR: In this paper, the memory performance of hafnium oxide (HfOx)-based resistive memory containing a thin reactive Ti buffer layer can be greatly improved due to the excellent ability of Ti to absorb oxygen atoms from the HfOx film after post-metal annealing.

TL;DR: In this article, a tri-gate nanowire poly-Si FET with embedded source/drain (e-S/D) and back gate was demonstrated, and the highly crystallized channel was fabricated by green nanosecond laser crystallization, chemical mechanical polish, and postsurface modification processes.

TL;DR: In this paper, a monolithic 3D image sensor is demonstrated by sequentially fabricating large-area (>2cm×2cm) monolayer (20A/W) TMD phototransistor array on logic/memory hybrid 3D+IC.