Ching-Hua Wang

TL;DR: The opportunities, progress and challenges of integrating atomically thin materials with silicon-based nanosystems are reviewed, and the prospects for computational and non-computational applications are considered.

TL;DR: In this paper, a novel HfO2-based resistive memory with the TiN electrodes is proposed and fully integrated with 0.18 mum CMOS technology, which uses a thin Ti layer as the reactive buffer layer into the anodic side of capacitor-like memory cell, and excellent memory performances such as low operation current (down to 25 muA), high on/off resistance ratio (above 1,000), fast switching speed (5 ns), satisfactory switching endurance (>106 cycles) have been demonstrated in the memory device.

TL;DR: In this paper, a 3D vertical bipolar junction transistor (BJT) ReRAM cell with CMOS compatible process is reported, which is vertically formed underneath the resistive stacked film of TiN/Ti/HfO 2 /TiN as a high performance current driver and bit-cell selector.

TL;DR: Unipolar n-type BP transistors with low work function Sc and Er contacts are reported, demonstrating a record high n- type current of 200 μA/μm in 6.5 nm thick BP.

TL;DR: It is more effective to further enhance graphene barrier reliability by improving single-layer graphene quality through increasing grain sizes or using single-crystalline graphene than just by increasing thickness through multi-transfer.