Cree Inc.

About: Cree Inc. is a company organization based out in Shenzhen, China. It is known for research contribution in the topics: Layer (electronics) & Silicon carbide. The organization has 1014 authors who have published 2436 publications receiving 64884 citations.

High efficiency leds with tunnel junctions

Abstract: An LED made from a wide band gap semiconductor material and having a low resistance p-type confinement layer with a tunnel junction in a wide band gap semiconductor device is disclosed. A dissimilar material is placed at the tunnel junction where the material generates a natural dipole. This natural dipole is used to form a junction having a tunnel width that is smaller than such a width would be without the dissimilar material. A low resistance p-type confinement layer having a tunnel junction in a wide band gap semiconductor device may be fabricated by generating a polarization charge in the junction of the confinement layer, and forming a tunnel width in the junction that is smaller than the width would be without the polarization charge. Tunneling through the tunnel junction in the confinement layer may be enhanced by the addition of impurities within the junction. These impurities may form band gap states in the junction.

Troffer-style optical assembly

Abstract: A troffer-style fixture. The fixture is particularly well-suited for use with solid state light sources. The troffer comprises a light engine unit surrounded by a reflective pan. An elongated heat sink comprises a mount surface for light sources. An elongated lens is mounted on or above the heat sink. The mount surface is designed to accommodate the light emitters which may come on prefabricated a light strip. One or more reflectors extend out away from the heat sink on the mount surface side. A lens plate is mounted to proximate to the heat sink and extends out to the edge of the reflector(s). An interior cavity is at least partially defined by the reflector(s), the lens plates, and the heat sink. One or more light sources disposed along the heat sink mount surface emit light into the interior cavity where it can be mixed and/or shaped before it is emitted.

Led package die having a small footprint

Abstract: A light emitting die package (10) and a method of making the light emitting die package (10) are disclosed. The die package (10) includes a stem substrate (20) having grooves (26), a wire lead (30) attached to the grooves (26), and a light emitting diode (LED) (50) mounted on the stem substrate (50). Also coupled to the substrate (20) are a sleeve (40), a reflector (60), and a lens (70). To make the light emitting die package (10), a long substrate is formed and wire leads (30) attached to the substrate. Then, the substrate including the attached wire leads is cut to predetermine lengths to form individual stem substrates (20). To each stem substrate (20), LED (50), reflector (60), and lens (70) are coupled.

Methods and Apparatus for Improved Heat Spreading in Solid State Lighting Systems

Abstract: A solid state lighting subassembly or fixture includes an anisotropic heat spreading material. A heat spreading layer may be placed between a light emitting diode (LED) and luminaire or reflector and serves to spread heat laterally away from the LED. Low profile, low weight heat spreading may be utilized both to retrofit existing light fixtures with. LEDs or to replace existing incandescent and fluorescent fixtures with LED based fixtures.

Silicon carbide metal-semiconductor field effect transistors

Abstract: SiC MESFETs are disclosed which utilize a semi-insulating SiC substrate which substantially free of deep-level dopants. Utilization of the semi-insulating substrate may reduce back-gating effects in the MESFETs. Also provided are SiC MESFETs with a two recess gate structure. MESFETS with a selectively doped p-type buffer layer are also provided. Utilization of such a buffer layer may reduce output conductance by a factor of 3 and produce a 3 db increase in power gain over SiC MESFETs with conventional p-type buffer layers. A ground contact may also be provided to the p-type buffer layer and the p-type buffer layer may be made of two p-type layers with the layer formed on the substrate having a higher dopant concentration. SiC MESFETs according to embodiments of the present invention may also utilize chromium as a Schottky gate material. Furthermore, an oxide-nitride-oxide (ONO) passivation layer may be utilized to reduce surface effects in SiC MESFETs. Also, source and drain ohmic contacts may be formed directly on the n-type channel layer, thus, the n + regions need not be fabricated and the steps associated with such fabrication may be eliminated from the fabrication process. Methods of fabricating such SiC MESFETs and gate structures for SiC FETs as well as passivation layers are also disclosed.