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Showing papers in "IEEE Transactions on Electron Devices in 1970"


Journal ArticleDOI
TL;DR: In this paper, the authors derived transport equations for particles, momentum, and energy of electrons in a semiconductor with two distinct valleys in the conduction band, such as GaAs.
Abstract: Transport equations are derived for particles, momentum, and energy of electrons in a semiconductor with two distinct valleys in the conduction band, such as GaAs. Care is taken to state and discuss the assumptions which are made in the derivation. The collision processes are expressed in terms of relaxation times. The accuracy is improved by considering these to depend on the average kinetic energy rather than the electron temperature. Other transport equations used in the literature are discussed, and shown to be incomplete and inaccurate in many cases. In particular, the usual assumption that the mobility and diffusion constant depend locally on the electric field strength is shown to be incorrect. Rather, these quantities should be taken as functions of the local average velocity of electrons in the lower valley.

765 citations


Journal ArticleDOI
TL;DR: In this paper, it was shown that transistors having thin, lightly doped collector regions are particularly susceptible to avalanche injection, which suggests that some compromise may be necessary in the design of high-frequency power transistors.
Abstract: A rapid type of second breakdown observed in silicon n+-p-n-n+transistors is shown to be due to avalanche injection at the collector n-n+junction. Localized thermal effects, which are usually associated With second breakdown, are shown to play a minor role in the initiation of the transition to the low voltage state. A useful tool in the analysis of avalanche injection is the n+-n-n+diode, which exhibits negative resistance at a critical voltage and current. A close correspondence between the behavior of the diode and the transistor (open base) is established both theoretically and experimentally. Qualitative agreement with the proposed model is obtained for both directions of base current flow. It is shown that transistors having thin, lightly doped collector regions are particularly susceptible to avalanche injection, which suggests that some compromise may be necessary in the design of high-frequency power transistors.

214 citations


Journal ArticleDOI
R.C. Joy1, E.S. Schlig1
TL;DR: In this paper, a mathematical model of the three-dimensional transient heat flow problem is presented which takes into account the physical structure of the device and the actual region of power dissipation.
Abstract: Recent predictions that thermal effects will limit future transistor speed improvement motivated an interest in predicting and measuring these effects. A mathematical model of the three-dimensional transient heat flow problem is presented which takes into account the physical structure of the device and the actual region of power dissipation. At any point within the device, the model predicts the time-dependent temperature response to a change in power dissipation. A new method of measuring the local time-dependent thermal behavior of small bipolar transistors is described and used to verify the model. It was found that the thermal spreading resistance becomes important in silicon transistors when the emitter stripe dimensions approach 1 µ. Furthermore, the thermal response is much slower than the electrical response. Also, it was confirmed that adjacent devices in integrated circuits are essentially thermally isolated as far as thermal spreading resistance is concerned.

162 citations


Journal ArticleDOI
TL;DR: In this paper, a simplified physical model was used to describe TRAPATT (TRApped Plasma Avalanche Triggered Transit) operation, and a complete high-efficiency device design was generated and the dependence of operation on physical parameters was elucidated.
Abstract: This paper utilizes a simplified physical model to describe TRAPATT (TRApped Plasma Avalanche Triggered Transit) operation. By yielding on computational accuracy, a complete high-efficiency device design is generated and the dependence of operation on physical parameters is elucidated. The extreme complexity of the precise differential equations describing TRAPATT operation has made the calculation of a single diode-circuit configuration a tour de force. However, by observing the important features of such a solution, a simplified approach giving realistic answers has been evolved. A theoretical device design has been evolved. This design provides device width and impurity density as a function of TRAPATT frequency, and indicates a decreasing degree of "reach through" with increasing frequency. In addition, the explicit dependence of width and impurity density on the diode's reverse saturation current has been obtained. The launching of the avalanche zone through the diode, and, in particular, the limitations implicit in the recovery to a swept-out state, are of broad significance in other types of diodes, particularly p-i-n switches and "snap" diodes.

109 citations


Journal ArticleDOI
John A. Copeland1
TL;DR: In this paper, a numerical calculation indicates that for uniform doping, the apparent doping will be higher than the actual doping by a factor of (1 + bx/r)^{3} where b=1.5 and x/r is the ratio of depth x to diode radius r.
Abstract: Diode edge effects can be a source of error in doping profile measurements made by the capacity versus voltage technique or CIP technique. A numerical calculation indicates that for uniform doping the apparent doping will be higher than the actual doping by a factor of (1 +bx/r)^{3} where b=1.5 and x/r is the ratio of depth x to diode radius r . Comparison with other sources of error shows that edge-effect error will be the largest error when the diode diameter is greater than 10 mils (250 µm) because this error decreases at the slowest rate as the diameter increases (as the reciprocal of the diameter rather than the reciprocal of the diameter squared).

84 citations


Journal ArticleDOI
B.V. Gokhale1
TL;DR: In this article, the authors describe a technique of obtaining numerical solutions of the basic carrier transport equations for a semiconductor and the results of some calculations pertaining to a silicon n-p-n transistor.
Abstract: This paper describes a technique of obtaining numerical solutions of the basic carrier transport equations for a semiconductor and the results of some calculations pertaining to a silicon n-p-n transistor. The calculations include dc characteristics in direct and inverse operation, saturation parameters, and small-signal ac common emitter h -parameters. Both Boltzmann and Fermi statistics have been used, and the dependence of carrier mobilities on electric field has been taken into account.

70 citations


Journal ArticleDOI
TL;DR: In this paper, the drift velocity saturation of the current carriers in the channel of a MOSFET iS was shown to be an important factor in the analysis of the electrical behavior of such devices.
Abstract: It is shown that the drift velocity saturation of the current carriers in the channel of a MOSFET iS an important factor in the analysis of the electrical behavior of such devices. The theory presented here, which includes this effect, shows improved agreement with measured output characteristics.

67 citations


Journal ArticleDOI
TL;DR: In this article, it was shown that a short pulse (shorter than a space charge build-up time) could be used to electrically quench dynamic scattering and appreciably reduce the relaxation time.
Abstract: Evaluation of fabrication procedures and operating life have indicated that moisture can play a major role in determining the performance of nematic liquid crystal displays based on the dynamic scattering mode (DSM) in anisylidene-p-aminophenyl-acetate. There is strong evidence that the presence of moisture promotes electron injection by lowering the potential barrier between the metal electrode and the liquid crystal. This could arise from a lowering of the effective work function of the metal by adsorption and/or increasing the electron affinity of the liquid crystal by molecular attachment. In any case the injected electron is captured by a neutral molecule and transported as a negative ion. The electron is removed by an oxidation process at the anode leaving the original molecular species free to repeat the process. It was also found that a short pulse (shorter than a space charge build-up time) could be used to electrically quench dynamic scattering and appreciably reduce the relaxation time. The use of this new scheme significantly improves the brightness and contrast of matrix addressed, real time displays based on dynamic scattering. A novel "laminate" structure for realizing such displays is also presented.

66 citations


Journal ArticleDOI
TL;DR: In this article, a model for the generation-recombination noise and trapping noise in metal-semiconductor Schottky barrier diodes is developed and the experimental results on trapping noise can be described by assuming that the trap states have a constant capture cross section and are uniformly distributed in space, as well as in energy.
Abstract: Theoretical models for the generation-recombination noise and trapping noise in metal-semiconductor Schottky barrier diodes are developed. Low-frequency excess noise in Schottky barrier diodes is found to be dominated by the modulation of the barrier height φB caused by fluctuation in the charge state of traps or generation-recombination centers. This noise mechanism does not occur in p-n junctions. The bias and the temperature dependence of the generation-recombination noise is critically compared with the experimental data for forward diode current ranges from 3 to 300 µA and operating temperatures from -25° to 100°C. Trapping noise in Schottky barrier diodes is observed at low temperatures in diodes not intentionally doped with deep level impurities. The experimental results on trapping noise can be described by assuming that the trap states have a constant capture cross section and are uniformly distributed in space, as well as in energy. The surface potential at the diode periphery also has an important effect on the Schottky barrier diode noise. The best low-frequency noise behavior is found when the surface is at the flat-band condition. An accumulated surface is always associated with a large amount of low-frequency excess noise.

63 citations


Journal ArticleDOI
TL;DR: In this paper, an analysis of the nonlinear behavior of power amplifiers utilizing negative-resistance diodes in a reflection circuit is presented for both stable and locked-oscillator modes of operation.
Abstract: An analysis is presented for the nonlinear behavior of power amplifiers utilizing negative-resistance diodes in a reflection circuit. The analysis applies to both stable and locked-oscillator modes of operation. Special emphasis is given to a simple model involving a cubic nonlinearity in the I-V relationship, and to the idealized LSA device in an amplification mode.

61 citations


Journal ArticleDOI
Jr. H.J. Ruhl1
TL;DR: In this paper, a simple model based on lateral fields present in the p-base of a modern thyristor is derived and compared with a diffusion model by examining the validity of their predictions.
Abstract: The modeling, measurement, and magnitude of the plasma-spreading velocity in a modern thyristor structure is discussed. A simple model based on lateral fields present in the p-base of the thyristor is derived. This model is compared with a diffusion model by examining the validity of their predictions. Data on the effects of variations in radial position, current density, temperature, base widths, cathode-emitter short density, and gold recombination site density are presented. Basically, the data show that the spreading velocity is l) independent of radial position 2) a linear function of the log of the current density, 3)increased with increasing temperature, 4) increased with decreasing p-base width, 5) decreased cathode emitter short density, and 6) decreased recombination site density. The derived model is shown to provide a reasonable explanation for these effects which is qualitative and in some cases quantitative.

Journal ArticleDOI
N. Braslau1, P.S. Hauge
TL;DR: In this paper, the velocity-field characteristic of both bulk and epitaxial GaAs was investigated from measurements of the average conductivity of bar samples in a large microwave field.
Abstract: This paper summarizes investigations of the velocity-field characteristic of both bulk and epitaxial GaAs as determined from measurements of the average conductivity of bar samples in a large microwave field. The characteristic for both epitaxial and bulk material with resistivity about 1 Ω.cm is similar to that reported by Ruch and Kino, and to that calculated from solutions of the Boltzmann equation. The bulk material, however, shows a decrease of negative differential mobility with increasing resistivity. The non-linear partial differential equation in one dimension and time governing the field in the samples has been solved numerically and the evolution of the field rearrangement under these experimental conditions has been modelled to show the validity of this technique.

Journal ArticleDOI
TL;DR: In this paper, an analytical approach to the design of power transistors with an empirically derived method of predicting failure under conditions of thermal fatigue is presented. But the authors do not consider the impact of thermal cycling of the transistor on the performance of the transistors.
Abstract: In silicon power transistor applications, thermal cycling of the transistor may activate a failure mechanism called thermal fatigue. This phenomenon is caused by the mechanical stresses set up by the differential in the thermal expansions of the various materials used in the assembly and heat sink of the transistor. Thermal fatigue often results in cracking of the silicon pellet or failure at the silicon mounting interface. This paper discusses the two types of interfaces encountered in power-transistor chip mounting. In type I (hard-solder) systems, the stress-strain relationship is treated in the elastic region. In type II (soft-solder) systems, the stress-strain relationship is plastic in that at least one component exhibits material flow. For the type I systems, a method is suggested for calculation of the forces acting at each interface. For type II systems, an empirical approach to predicting the number of cycles to failure is given. Accelerated testing techniques for thermal-fatigue evaluation are suggested, and a method of predicting performance for various mounting systems is given. This method uses an equation of the form N = A_{0}e^{(\gamma0/H)} . This paper combines an analytical approach to the design of power transistors with an empirically derived method of predicting failure under conditions of thermal fatigue.

Journal ArticleDOI
N.J. Dionne1
TL;DR: In this paper, the authors investigated the harmonic generation in traveling-wave tubes (TWT's) via large-signal analysis and digital computer techniques, and showed that the second harmonic interference in the beam bunching process leads to substantial efficiency reduction in TWT's employing relatively nondispersive structures.
Abstract: This paper describes the investigation of harmonic generation in traveling-wave tubes (TWT's) via large-signal analysis and digital computer techniques. Efficiency degradation and harmonic power content are shown to be importantly related to such TWT design considerations as circuit dispersion, harmonic coupling impedance ratio, and gain level. Also described is the phenomenon of second harmonic interference in the beam bunching process and how it leads to substantial efficiency reduction in TWT's employing relatively nondispersive structures.

Journal ArticleDOI
TL;DR: In this article, the authors reported the results of measurements of basic light-gate devices using lead zirconate-lead titanate ferroelectric ceramic plates, which can have low-loss optical transmission in thin, polished sections and uniaxial birefringence dependent upon remanent polarization.
Abstract: Plates of lead zirconate-lead titanate ferroelectric ceramic can have 1) low-loss optical transmission in thin, polished sections and 2) uniaxial birefringence dependent upon remanent polarization. These properties are potentially useful in electrically variable optical retarders, modulators, and latching light gates. This paper reports the results of measurements of basic light-gate devices using ferroelectric ceramic plates. A number of characteristics of the devices are reported; e.g., dependence of absolute light phase retardation on ceramic remanent polarization; dependence of ON-OFF ratio on exit aperture, switching pulse duration, and light wavelength; switching speed; and the dc hysteresis characteristic of the dependence of remanent polarization upon applied field. In the past, the use of ferroelectric devices under conditions producing partial switching has been discussed exclusively from the point of view of "charge-limited switching." This paper proposes a new mode of operating ferroelectric ceramic light gates using "voltage-controlled switching." Charge-limited switching results naturally when voltage pulses of short duration are used (appreciable ON-OFF ratios can be obtained from a light gate switched with pulses as short as 10 ns). As a result of the hysteresis in the dc switching characteristic, pulses with durations of the order of milliseconds or longer result in operation of the light gate in a voltage-controlled mode. Practical advantages resulting from this mode of operation are discussed.

Journal ArticleDOI
TL;DR: In this paper, the authors calculated the noise resistance of the field effect transistor taking into account high-field effects such as mobility saturation and hot carrier temperature upon the thermal noise, and compared it with measurements of the noise of a junction gate FET and a MOS tetrode with short active channels.
Abstract: The noise resistance of the field-effect transistor has been calculated taking into account high-field effects such as mobility saturation and hot carrier temperature upon the thermal noise. The result of the calculations can be represented by a practical formula. The calculated results have been compared with measurements of the noise of a junction gate FET and a MOS tetrode with short active channels. The agreement is reasonable. At room temperature the effect is moderate, but at low temperatures it is considerable.

Journal ArticleDOI
B.R. Chawla1, H.K. Gummel
TL;DR: In this paper, a numerical technique for calculating the resistance of two-terminal distributed resistors and the resistance matrix for multiterminal regions in integrated circuit layers is presented, which is useful for computer-aided design of multi-minal resistors, making use of Cauchy's integral formula which facilitates coordination of conformal transformations at singular boundary points.
Abstract: A numerical technique is presented for calculating the resistance of two-terminal distributed resistors and the resistance matrix for multiterminal regions in integrated circuit layers. The technique, useful for computer-aided design of multiterminal resistors, makes use of Cauchy's integral formula which facilitates coordination of conformal transformations at Singular boundary points. Results for a simple test structure (16 boundary points, 0.07 percent error in conductance calculation, 1.8 seconds computation time on a GE 635 computer) indicate this technique to be faster than various published techniques on computation time versus accuracy basis. The technique is applicable to structures with boundaries consisting of straight lines and circular arcs, multiply-connected, multiterminal, and open structures.

Journal ArticleDOI
TL;DR: In this paper, the influence of carrier lifetime on the characteristics of high power devices has been examined from the standpoint of forward voltage drop at a given current, using existing theories of the p+ln+diode and allowing for carrier-carrier scattering effects.
Abstract: The influence of carrier lifetime on the characteristics of high-power devices has been examined from the standpoint of forward voltage drop at a given current, using existing theories of the p+ln+diode and allowing for carrier-carrier scattering effects. It is found that in the absence of recombination current in the heavily doped end regions, there exists an optimum base lifetime giving a minimum forward voltage. This minimum occurs because for increasing lifetime, the increase in junction voltage due to carrier buildup at the junction edge eventually overtakes the reduction in base voltage due to conductivity modulation. On the other hand, when the recombination currents in the end regions predominate over that in the base, their presence tends to inhibit carrier buildup, with the result that for sufficiently large values of base lifetime, the forward voltage falls to a limiting value. In certain cases, this value is less than the minimum voltage found in the absence of recombination in the end regions. In all the cases examined, the conclusion is that little is to be gained by further increase in lifetime beyond a certain value which depends on both the properties of the base and those of the end regions.

Journal ArticleDOI
F.T. Wenthen1
TL;DR: Methods for speeding convergence are shown, including acceleration algorithms and simple guidelines for ordering matrices and selecting node boundaries, and various forms of the finite difference method are discussed.
Abstract: Thermal analysis of power semiconductor devices is often complicated by odd geometries and the nonlinear properties of materials. It is the type of problem that can best be handled by a computer. Fortunately, numerous general-purpose heat transfer programs have been written that can be applied to power semiconductor deyices. The majority of programs were written for other technologies (aircraft engines, nuclear energy, and space) but they are sufficiently general for electronic applications. These programs are most often based on the method of finite differences. While this method can yield results to any degree of accuracy required, it is not readily apparent just how accurate the results are. In general, a user desires results as accurate as necessary while minimizing the cost of the problem solution. This paper deals with methods of achieving that goal. Descriptions of truncation and convergence errors are given along with methods of estimating their magnitude. Various forms of the finite difference method are discussed. Methods for speeding convergence are shown, including acceleration algorithms and simple guidelines for ordering matrices and selecting node boundaries. Convenient methods of displaying and interpreting the results are also discussed.

Journal ArticleDOI
TL;DR: In this paper, the reverse recovery time for a p-n junction is found to be equal to the base lifetime τ if the ramp rate R \ll I_{F} / \tau, or 0.79τ if R \approx I{F}/τ, and 0.7 τ if r \gg I{I} / τ.
Abstract: When a p-n junction is switched from the forward to the reverse direction by a current ramp, the reverse recovery time t rr is found 1) either to be equal to the base lifetime τ if the ramp rate R \ll I_{F} / \tau , 2) to be equal to 0.79τ if R \approx I_{F} / \tau , or 3) to be equal to 0.7 τ if R \gg I_{F} / \tau . These results afford correlations between τ rr and τ and also provide the basis for a useful method for measuring τ.

Journal ArticleDOI
C.N. Berglund1, R.H. Walden1
TL;DR: In this article, a particular thin-film structure is analyzed to determine the conditions for thermal filament formation, assuming that the structure is electrically biased so that a thermal filament exists, the currentvoltage characteristic and small-signal equivalent circuit for a general conductivity-temperature characteristic in the thin film are determined.
Abstract: A particular thin-film structure is analyzed to determine the conditions for thermal filament formation. Assuming that these conditions are satisfied and that the structure is electrically biased so that a thermal filament exists, the current-voltage characteristic and small-signal equivalent circuit for a general conductivity-temperature characteristic in the thin film are determined. It is shown that an abrupt or discontinuous change in conductivity with temperature of the type observed in materials exhibiting semiconductor-metal transitions is not necessary to obtain thermal filaments. It is also shown that if there is no thermal hysteresis in the conductivity -temperature characteristic of the thin film, the filament equivalent circuit for the particular structure analyzed is closely approximated by a resistance in parallel with an inductance. The thin-film prop. erties required for this inductance to be independent of both the ambient temperature and the bias current are defined. If thermal hysteresis exists, the analysis shows that small-signal distortions occur, the inductance will become frequency dependent at low frequencies, and a nonlinear resistance must be added to the equivalent circuit in series with the inductance. Measurements on this structure using VO 2 as the thin-film material are presented and discussed, and are shown to verify the conclusions based on the analysis.

Journal ArticleDOI
TL;DR: In this article, measurements on the noise resistance and the noise conductance of the junction-gate FET in the temperature range 77°K-400°K have been reported.
Abstract: Measurements are reported on the noise resistance and the noise conductance of the junction-gate FET in the temperature range 77°K-400°K. At low temperatures anomalous noise behavior has been observed. The measurements are discussed in the light of existing theories and, when necessary, the theoretical model has been extended. The agreement is satisfactory. Generally the extra noise is caused by mobility saturation, increased free-carrier temperature, free-carrier trapping and multiplication effects in the pinched-off region. Finally, several applications are discussed in relation to the limiting noise sources.

Journal ArticleDOI
TL;DR: In this article, the maximum frequency of oscillation for GaAs-Ge heterojunction transistors utilizing either doped or high-resistivity space-charge-limited emitters was calculated.
Abstract: Assuming a state-of-the-art microwave planar geometry, the maximum frequency of oscillation has been calculated for GaAs-Ge heterojunction transistors utilizing either doped or high-resistivity space-charge-limited emitters. This is compared with a Ge homojunction transistor of the same geometry. A detailed equivalent circuit is used which accounts for the parasitics of the chip. It is shown that if chip parasitics are neglected, GaA-Ge devices should outperform Ge devices by about 4 to 1 in power gain. In the geometry assumed, however both heterojunction and homojunction transistors are limited by wafer parasitics, particularly base contact resistance. The calculated figures of merit of the two types of devices are therefore quite similar.

Journal ArticleDOI
I. Somos1, D.E. Piccone1
TL;DR: In this article, the plasma spread properties of various thyristors were studied utilizing an infrared viewing technique, and the plasma velocity occurring prior to equilibrium, and plasma spread conditions at equilibrium were determined.
Abstract: The plasma spread properties of various thyristors were studied utilizing an infrared viewing technique. The plasma velocity occurring prior to equilibrium, and plasma spread conditions at equilibrium were determined. Velocity versus current density diagrams were generated for low-frequency, high-voltage and high-frequency, low-voltage devices. Effect of the initial turned-on line on plasma spreading is discussed.

Journal ArticleDOI
TL;DR: In this paper, a method was proposed to deduce the energy distribution of interface states and the mobility ratio of carriers simultaneously from Hall effect measurements at two different temperatures, using this method, the interface-state density N ss and mobility ratio r of carriers were determined on both n-channel and p-channel silicon MOS transistors.
Abstract: A method has been proposed to deduce the energy distribution of interface states and the mobility ratio of carriers simultaneously from Hall effect measurements at two different temperatures. Using this method, the interface-state density N ss and the mobility ratio r of carriers were determined on both n-channel and p-channel silicon MOS transistors. The result indicates that N ss determined in this method is very small near the center of the energy gap and increases as the energy of the states approaches the band edges. The interface-state density inside the conduction and the valence band was found as high as 1013cm-2eV-1. The value of mobility ratio was found to depend both on temperature and surface-carrier density. Increase of mobility ratio with decreasing carrier density was observed in all samples, it is interpreted as due to diffuse scattering and to Coulomb scattering by localized interface charges.

Journal ArticleDOI
TL;DR: In this article, all the stationary solutions that can be obtained for different values of carrier concentration and field at the cathode were analyzed. But the method employed is that of the "field of directions," used extensively by Boer and associates, mainly for CdS.
Abstract: In the approximations usually employed, the behavior of a GaAs sample in high fields is determined by Poisson's equation and current continuity plus appropriate boundary conditions. It has been demonstrated recently that boundary conditions can determine such properties as the threshold for Gunn oscillations and their amplitude [1]. In this paper we go through all the stationary solutions that can be obtained for different values of carrier concentration and field at the cathode. The method employed is that of the "field of directions," used extensively by Boer and associates [2], mainly for CdS. By means of this analysis, it is possible to understand many diverse phenomena found experimentally or predicted by computer solutions, e.g., 1) the finding of Shaw, Solomon, and Grubin [3] that, for a cathode field in the negative differential conductivity (NDC) range, the Gunn threshold occurs at a current density j \cong nev_{d}(E_{c}) , where n is carrier concentration and v_{d}(E_{c}) the drift velocity at the cathode field; 2) the switching, decrease of current with increasing voltage, and hysteresis found by Kroemer [1] for a sample with a shallow Schottky barrier; 3) the switching that occurs in some samples, after the initiation of Gunn oscillations, to a low-resistance state with an avalanche region at the anode.

Journal ArticleDOI
G.S. Kino1
TL;DR: A detailed treatment of the space-charge waves or carrier waves which are associated with drifting carriers in a semiconductor is given in this paper, where the treatment neglects the effect of diffusion so as to keep the mathematics simple and emphasize the physics of the problem.
Abstract: A detailed treatment of the space-charge waves or carrier waves which are associated with drifting carriers in a semiconductor is given. These waves have a phase velocity comparable to that of the drifting carriers, but normally have very high loss. This dielectric relaxation loss may be radically decreased by utilizing the interaction between two sets of carriers, working with semiconductors of small cross section, or semiconductors placed against high permittivity materials. Gain may be obtained by using special materials such as GaAs, or by the use of interactions between two sets of carriers in the presence of a magnetic field. The treatment given neglects the effect of diffusion so as to keep the mathematics simple and emphasize the physics of the problem. In a later paper, methods of taking diffusion into account will be given.

Journal ArticleDOI
TL;DR: In this paper, a two-dimensional numerical analysis for junction field-effect transistors with small and large values of length-to-width ratio is presented, where the effects of the geometry of the device and the field dependent mobility to the drain characteristics are clarified.
Abstract: A two-dimensional numerical analysis has been amde for junction field-effect transistors with small and large values of length-to-width ratio. Comparison of the results for different drain bias voltages shows the cause of the saturation of the drain current and the finite differential drain conductance in the saturation region. The effects of the geometry of the device and the field dependent mobility to the drain characteristics are clarified. Detailed pictures of the free carrier density distribution are presented, and the minimum channel width and the channel length are given for various bias conditions. A conduction path from the source to the drain with appreciable free carrier density has been found for bias conditions normally considered as pinched-off conditions. The drain characteristic with gate bias voltage is seen to be equivalent to that of a device with correspondingly smaller width and zero gate bias.

Journal ArticleDOI
R.H. Walden1
TL;DR: In this article, a two-terminal threshold switch and a fourterminal thermal relay were investigated theoretically and experimentally with regard to switching applications, and it was shown that both devices should be capable of submicrosecond switching times at milliwatt power levels.
Abstract: Vanadium dioxide undergoes a crystallographic phase transformation at 68°C which is accompanied by a large and abrupt change in resistivity. Two devices, a two-terminal threshold switch and a four-terminal thermal relay, based on this effect are investigated theoretically and experimentally with regard to switching applications. The formation of thermal filaments is found to have a strong influence on both the dc characteristics and on the switching properties. One consequence for both devices is that the power required to sustain the "on" condition is significantly less than that required for switching. It is shown that both devices should be capable of submicrosecond switching times at milliwatt power levels.

Journal ArticleDOI
II R.B. Robrock1
TL;DR: In this article, the authors developed a circuit oriented lumped model for the representation of the nucleation and propagation of single and multiple domains in n-GaAs, which accurately predicts device behavior during domain nucleation, modulation and quenching, without indicating domain position within the bulk.
Abstract: A study of the nucleation and propagation of single and multiple domains in n-GaAs has led to the development of a circuit oriented lumped model for the representation of this phenomenon. The lumped bulk model accurately predicts device behavior during domain nucleation, modulation and quenching, without indicating domain position within the bulk. The proposed equivalent circuit is developed in a logical fashion and its implications are pursued in some detail. Device studies with the lumped model have produced results exhibiting exceptional agreement with BULK-D, a digital computer program which determines the electric field and carrier distributions in bulk GaAs from current continuity considerations and Poisson's equation.