Journal ArticleDOI
A High-Linearity, 17 ps Precision Time-to-Digital Converter Based on a Single-Stage Vernier Delay Loop Fine Interpolation
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TLDR
A time-to-digital converter architecture capable of reaching high-precision and high-linearity with moderate area occupation per measurement channel with a couple of two-stage interpolators that exploit the cyclic sliding scale technique in order to improve the conversion linearity.Abstract:
This paper presents a time-to-digital converter (TDC) architecture capable of reaching high-precision and high-linearity with moderate area occupation per measurement channel. The architecture is based on a coarse counter and a couple of two-stage interpolators that exploit the cyclic sliding scale technique in order to improve the conversion linearity. The interpolators are based on a new coarse-fine synchronization circuit and a new single-stage Vernier delay loop fine interpolation. In a standard cost-effective 0.35 μm CMOS technology the TDC reaches a dynamic range of 160 ns, 17.2 ps precision and differential non-linearity better than 0.9% LSB rms. The TDC building block was designed in order to be easily assembled in a multi-channel monolithic TDC chip. Coupled with a SPAD photodetector it is aimed for TCSPC applications (like FLIM, FCS, FRET) and direct ToF 3-D ranging.read more
Citations
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Journal ArticleDOI
Non-line-of-sight imaging using a time-gated single photon avalanche diode.
TL;DR: A non-line-of-sight imaging system that uses a single-pixel, single-photon avalanche diode (SPAD) to collect time- of-flight information that provides significant improvements in terms of power requirements, form factor, cost, and reconstruction time, while maintaining a comparable time resolution.
Journal ArticleDOI
CMOS Imager With 1024 SPADs and TDCs for Single-Photon Timing and 3-D Time-of-Flight
Federica Villa,Rudi Lussana,Danilo Bronzi,Simone Tisa,Alberto Tosi,Franco Zappa,Alberto Dalla Mora,Davide Contini,Daniel Durini,Sascha Weyers,Werner Brockherde +10 more
TL;DR: In this article, the authors present a CMOS imager consisting of 32×32 smart pixels, each one able to detect single photons in the 300-900 nm wavelength range and to perform both photon-counting and photon-timing operations on very fast optical events with faint intensities.
Journal ArticleDOI
New frontiers in time-domain diffuse optics, a review
Antonio Pifferi,Antonio Pifferi,Davide Contini,Alberto Dalla Mora,Andrea Farina,Lorenzo Spinelli,Alessandro Torricelli,Alessandro Torricelli +7 more
TL;DR: This study shows how these tools could lead on one hand to compact and wearable time-domain devices for point-of-care diagnostics down to the consumer level and on the other hand to powerful systems with exceptional depth penetration and sensitivity.
Journal ArticleDOI
SPAD Smart Pixel for Time-of-Flight and Time-Correlated Single-Photon Counting Measurements
Federica Villa,Bojan Markovic,S. Bellisai,Danilo Bronzi,Alberto Tosi,Franco Zappa,Simone Tisa,Daniel Durini,Sascha Weyers,Uwe Paschen,Werner Brockherde +10 more
TL;DR: In this article, a smart pixel based on a single-photon avalanche diode (SPAD) for advanced time-of-flight (TOF) and time-correlated single photon counting (TCSPC) applications, fabricated in a cost-effective 0.35-m CMOS technology is presented.
Journal ArticleDOI
CMOS SPADs: Design Issues and Research Challenges for Detectors, Circuits, and Arrays
Darek Palubiak,M. Jamal Deen +1 more
TL;DR: The most recent developments in DSM CMOS SPAD detectors, circuits and arrays are reviewed and discussed and issues of scalability, miniaturization and performance trade-offs involved in designing SPAD imaging systems are investigated.
References
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Journal ArticleDOI
Avalanche photodiodes and quenching circuits for single-photon detection
TL;DR: Avalanche photodiodes, which operate above the breakdown voltage in Geiger mode connected with avalanche-quenching circuits, can be used to detect single photons and are therefore called singlephoton avalanche diodes SPAD's.
Journal ArticleDOI
A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line
TL;DR: Test results show that even higher resolutions can be achieved using the VDL method, and resolutions down to 5 ps are demonstrated to be obtainable.
Journal ArticleDOI
A 9 b, 1.25 ps Resolution Coarse–Fine Time-to-Digital Converter in 90 nm CMOS that Amplifies a Time Residue
Minjae Lee,Asad A. Abidi +1 more
TL;DR: A new coarse-fine TDC architecture is proposed by using an array of time amplifiers and two identical fine TDCs that compensate for the variation of the TA gain during the conversion process, which will improve the linearity further.
Journal ArticleDOI
Review of methods for time interval measurements with picosecond resolution
TL;DR: Methods and techniques used for precise measurement of time intervals (TIs) or precise conversion of TIs to digital data are described, including the counter method and averaging, time stretching, time-to-amplitude conversion, the Vernier method, conversion utilizing tapped delay lines, and interpolation methods.