Proceedings ArticleDOI
An advanced embedded architecture for connected component analysis in industrial applications
Menbere Kina Tekleyohannes,Mohammadsadegh Sadri,Christian Weis,Norbert Wehn,Martin Klein,Michael Siegrist +5 more
- pp 734-735
TLDR
This paper proposes a hybrid software-hardware architecture of CCA for an industrial application using Xilinx Zynq-7000 All Programmable System on Chip (SoC), and offloading the most resource consuming part of the algorithm to the embedded CPU achieves high performance, while reducing the required resources on the FPGA.Abstract:
In recent years, connected component analysis (CCA) has become one of the vital image/video processing algorithms due to its wide-range applicability in the field of computer vision. Numerous applications such as pattern recognition, object detection and image segmentation involve connected component analysis. In the context of camera-based inspection systems, CCA plays an important role for quality assurance. State-of-the-art hardware architectures offer high performance implementations of CCA using field programmable gate arrays (FPGAs). However, due to their high memory-demand, most of these implementations inhibit a large resource utilization. In this paper, we propose a hybrid software-hardware architecture of CCA for an industrial application using Xilinx Zynq-7000 All Programmable System on Chip (SoC). By offloading the most resource consuming part of the algorithm to the embedded CPU, we achieved high performance, while reducing the required resources on the FPGA. Our proposed architecture saves more than 30% of on-chip memory (Block RAMs) compared to state-of-the-art hardware architectures without affecting the throughput. Furthermore, due to the embedded CPU, our system provides a versatile and highly flexible feature extraction at run-time without the necessity to reconfigure the FPGA.read more
Citations
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Journal ArticleDOI
A Parallel Connected Component Labeling Architecture for Heterogeneous Systems-on-Chip
TL;DR: This paper presents a novel hardware-oriented labeling approach able to process input pixels in parallel, thus speeding up the labeling task with respect to state-of-the-art competitors.
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The Design and Implementation of an Embedded Real-Time Automated IC Marking Inspection System
Fan-Hau Hsu,Chung-An Shen +1 more
TL;DR: A novel algorithm is presented which integrates the classic template matching approach with an efficient angle estimation method, so that the rotation and location of the IC chip can be identified precisely.
Journal ArticleDOI
A Memory-Efficient Hardware Architecture for Connected Component Labeling in Embedded System
Chen Zhao,Wu Gao,Feiping Nie +2 more
TL;DR: A quantitative comparison of memory cost shows that the proposed CCL architecture is memory-efficient and requires significantly fewer memory resources compared to other methods.
Journal ArticleDOI
A Low-Latency Multi-Touch Detector Based on Concurrent Processing of Redesigned Overlap Split and Connected Component Analysis
TL;DR: A low-latency multi-touch detector architecture for locating numerous touches in large-panel devices is presented, and it is demonstrated that the proposed detector takes less than a half latency of the existing ones while occupying only 17% silicon area and consuming 52% power on average.
Proceedings ArticleDOI
Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems
TL;DR: The proposed architecture executes a complete Connected Component Analysis by just one scan of the input image; therefore, it reaches performances higher than several existing hardware designs.
References
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Journal ArticleDOI
Optimizing two-pass connected-component labeling algorithms
TL;DR: It is demonstrated that the new two-pass labeling algorithm scales linearly with the number of pixels in the image, which is optimal in computational complexity theory and up to ten times faster than the contour tracing program distributed by the original authors.
Proceedings ArticleDOI
Optimised single pass connected components analysis
TL;DR: A new single pass algorithm is described that is a considerable improvement over the existing algorithms that reassigns and reuses labels each row to minimise the size of both the equivalence and region data tables.
Single Pass Connected Components Analysis
Donald G. Bailey,C.T. Johnston +1 more
TL;DR: A modification of this algorithm that allows the resolution of merged labels to be deferred enables the subsequent data analysis step to be combined with the labelling procedure, with the result that connected components can be analysed in a single pass by gathering data on the regions as they are built.
Proceedings ArticleDOI
Handel-C implementation of classical component labelling algorithm
M. Jablonski,M. Gorgon +1 more
TL;DR: The implementation of the image segmentation stage has been realized in real-time in the pipeline structure and the process of construction of optimal implementation has been shown, including the algorithm parallelization and taking advantage of the language features on the other.
Proceedings ArticleDOI
A run-length based connected component algorithm for FPGA implementation
TL;DR: The real-time connected component labelling algorithm designed for field programmable gate array (FPGA) implementation encodes the image, and performs connected component analysis on this representation, making integration with other real- time algorithms feasible.
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