Analytical study of the DC link capacitors voltage ripple in three level Neutral Point Clamped Inverters

TLDR: In this paper, an analytical study of the low frequency voltage ripple in the capacitors of a three level neutral point clamped topology, as a function of the DC link capacitors value and of the load impedance, is presented.

Abstract: Multilevel voltage source inverters have drawn a great interest in high power applications. These converters typically synthesize a staircase voltage waveform from several levels of DC capacitor voltages. It's well known that there is a big low frequency voltage ripple in the converter DC link capacitors in steady state, which affects the voltage to be blocked by the power transistors, so that the knowledge of this ripple is very important for the design of the converter. The capacitors voltage ripple also affects the harmonic distortion of the inverter output waveform. This paper presents an analytical study of the low frequency voltage ripple in the capacitors of a three level neutral point clamped topology, as a function of the DC link capacitors value and of the load impedance