36 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 35, NO. 1, JANUARY/FEBRUARY 1999
Multilevel Converters for Large Electric Drives
Leon M. Tolbert, Senior Member, IEEE, Fang Zheng Peng, Senior Member, IEEE,
and Thomas G. Habetler,
Senior Member, IEEE
Abstract—This paper presents transformerless multilevel con-
verters as an application for high-power and/or high-voltage
electric motor drives. Multilevel converters: 1) can generate near-
sinusoidal voltages with only fundamental frequency switching;
2) have almost no electromagnetic interference or common-mode
voltage; and 3) are suitable for large voltampere-rated motor
drives and high voltages. The cascade inverter is a natural fit for
large automotive all-electric drives because it uses several levels
of dc voltage sources, which would be available from batteries
or fuel cells. The back-to-back diode-clamped converter is ideal
where a source of ac voltage is available, such as in a hybrid
electric vehicle. Simulation and experimental results show the
superiority of these two converters over two-level pulsewidth-
modulation-based drives.
Index Terms—Cascade inverter, common-mode voltage, diode-
clamped inverter, electric vehicle, motor drive, multilevel con-
verter, multilevel inverter.
I. INTRODUCTION
A. Background
D
ESIGNS FOR heavy-duty electric and hybrid-electric
vehicles (EV’s) that have large electric drives will require
advanced power electronic inverters to meet the high power
demands (
250 kW) required of them. Development of large
electric drive trains for these vehicles will result in increased
fuel efficiency, lower emissions, and likely better vehicle
performance (acceleration and braking).
Transformerless multilevel inverters are uniquely suited
for this application because of the high voltampere ratings
possible with these inverters [1]. For EV’s, a cascaded H-
bridges inverter can be used to drive the traction motor from
a set of batteries or fuel cells. Where generated ac voltage
is available, such as from an alternator or generator, a back-
to-back diode-clamped converter can convert this source to
variable-frequency ac voltage for the driven motor.
Multilevel inverters also solve problems with some present
two-level pulsewidth modulation (PWM) adjustable-speed
drives (ASD’s). ASD’s usually employ a front-end diode
rectifier to convert utility ac voltage to dc voltage and an
inverter with PWM-controlled switching devices to convert
Paper IPCSD 98–68, presented at the 1998 IEEE Applied Power Electronics
Conference and Exposition, Anaheim, CA, February 15–19, and approved
for publication in the IEEE T
RANSACTIONS ON INDUSTRY APPLICATIONS by
the Industrial Drives Committee of the IEEE Industry Applications Society.
Manuscript released for publication September 8, 1998.
L. M. Tolbert and F. Z. Peng are with Oak Ridge National Laboratory, Oak
Ridge, TN 37831-8038 USA.
T. G. Habetler is with the School of Electrical and Computer Engineering,
Georgia Institute of Technology, Atlanta, GA 30332-0250 USA.
Publisher Item Identifier S 0093-9994(99)00454-5.
the dc voltage to variable frequency and variable voltage for
motor speed control.
Motor damage and failure have been reported by industry
as a result of some ASD inverters’ high-voltage change rates
, which produced a common-mode voltage across the
motor windings. High-frequency switching can exacerbate the
problem because of the numerous times this common mode
voltage is impressed upon the motor each cycle. The main
problems reported have been “motor bearing failure” and
“motor winding insulation breakdown” because of circulat-
ing currents, dielectric stresses, voltage surge, and corona
discharge [2]–[4].
Only recently have motor insulation failures become a
problem with some ASD’s because the increased switching
speed of contemporary power semiconductor devices causes
steep voltage wavefronts to appear at the motor terminals. The
voltage change rate
sometimes can be high enough
to induce corona discharge between the winding layers.
Present power semiconductors can be turned on and off
within 1
s for 600 V and higher voltages which can generate
broadband electromagnetic interference (EMI). These high-
speed semiconductor switches allow faster PWM carrier fre-
quencies. Although the high-frequency switching can increase
the motor running efficiency and is well above the acoustic
noise level, the
associated dielectric stresses between
insulated winding turns are also greatly increased.
Some PWM-controlled inverters can also cause large in-
stantaneous common-mode voltages to appear at the motor
terminals. These common-mode voltages appear across the
motor shaft to ground and induce bearing currents, which lead
to erosion of the bearing material and early mechanical failure.
Multilevel inverters overcome these problems because their
individual devices have a much lower
per switching,
and they operate at high efficiencies because they can switch
at a much lower frequency than PWM-controlled inverters.
B. Multilevel Inverters
The multilevel voltage source inverters’ unique structure
allows them to reach high voltages with low harmonics without
the use of transformers or series-connected synchronized-
switching devices. The general function of the multilevel
inverter is to synthesize a desired voltage from several levels
of dc voltages. For this reason, multilevel inverters can easily
provide the high power required of a large electric drive.
As the number of levels increases, the synthesized output
waveform has more steps, which produces a staircase wave
that approaches a desired waveform. Also, as more steps are
added to the waveform, the harmonic distortion of the output
wave decreases, approaching zero as the number of levels in-
0093–9994/99$10.00 1999 IEEE
TOLBERT et al.: MULTILEVEL CONVERTERS FOR LARGE ELECTRIC DRIVES 37
creases. As the number of levels increases, the voltage that can
be spanned by summing multiple voltage levels also increases.
The structure of the multilevel inverter is such that no voltage
sharing problems are encountered by the active devices.
Researchers have proposed three main types of trans-
formerless multilevel inverters thus far, the diode-clamped
inverter, the flying-capacitor inverter, and the cascade inverter.
Proposed uses for these converters have included static var
compensation [5]–[12], back-to-back high-voltage intertie
[13]–[15], and ASD’s [15]–[20].
Using multilevel inverters as drives for electric motors is a
much different application than for the utility applications for
which they were originally developed. Only reactive power
flows between the converter and the system in static var
compensation, whereas the converter must handle bidirectional
real power flow in the case of motor drives.
Three-, four-, and five-level rectifier-inverter drive systems
that have used some form of multilevel PWM as a means to
control the switching of the rectifier and inverter sections have
been investigated in the literature [16]–[20]. Multilevel PWM
has lower
than that experienced in some two-level
PWM drives because switching is between several smaller
voltage levels. However, switching losses and voltage total
harmonic distortion (THD) are still relatively high for these
proposed schemes; the output voltage THD was reported to
be 19.7% for a four-level PWM inverter without any output
filters [19].
This paper proposes two multilevel inverter configurations
where devices are switched only at the fundamental frequency
and the inverter output line voltage THD is 5% without the use
of any filtering components. In addition, a control scheme will
be demonstrated in the multilevel diode-clamped converter that
obtains well-balanced voltages across the dc-link capacitors.
II. C
ASCADED H-BRIDGES INVERTER
A. General Structure and Operation
A cascaded multilevel inverter consists of a series of H-
bridge (single-phase full-bridge) inverter units. The general
function of this multilevel inverter is to synthesize a desired
voltage from several separate dc sources (SDCS’s), which may
be obtained from batteries, fuel cells, or solar cells. Fig. 1
shows a single-phase structure of a cascade inverter with
SDCS’s [6]. Each SDCS is connected to a single-phase full-
bridge inverter. Each inverter level can generate three different
voltage outputs,
, and , by connecting the dc
source to the ac output side by different combinations of the
four switches,
, and . To obtain , switches
and are turned on. Turning on switches and yields
. By turning on and or and , the output
voltage is
.
The ac outputs of each of the different level full-bridge
inverters are connected in series such that the synthesized
voltage waveform is the sum of the inverter outputs. The
number of output phase voltage levels in a cascade inverter is
defined by
, where is the number of dc sources.
An example phase voltage waveform for an 11-level cascaded
Fig. 1. Single-phase structure of a multilevel cascaded H-bridges inverter.
inverter with five SDSC’s and five full bridges is shown in
Fig. 2. The phase voltage
.
The output voltage of the inverter is almost sinusoidal, and
it has less than 5% THD with each of the H-bridges switching
only at fundamental frequency. Each H-bridge unit generates
a quasi-square waveform by phase shifting its positive and
negative phase legs’ switching timings. Fig. 2(b) shows the
switching timings to generate a quasi-square waveform. Note
that each switching device always conducts for 180
(or 1/2
cycle), regardless of the pulsewidth of the quasi-square wave.
This switching method makes all of the active devices’ current
stress equal.
For a stepped waveform such as the one depicted in Fig. 2
with
steps, the Fourier transform for this waveform is as
follows:
where (1)
From (1), the magnitudes of the Fourier coefficients when
normalized with respect to
are as follows:
where (2)
The conducting angles
can be chosen such that
the voltage total harmonic distortion is a minimum. Normally,
these angles are chosen so as to cancel the predominant lower
frequency harmonics [6], [12]. For the 11-level case in Fig. 2,
the 5th, 7th, 11th, and 13th harmonics can be eliminated with
the appropriate choice of the conducting angles. One degree of
freedom is used so that the magnitude of the output waveform
corresponds to the reference amplitude modulation index
which is defined as , where is the amplitude
command of the inverter output phase voltage, and
38 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 35, NO. 1, JANUARY/FEBRUARY 1999
(a)
(b)
Fig. 2. Waveforms and switching method of the 11-level cascade inverter.
is the maximum attainable amplitude of the converter, i.e.,
[15]. Let the equations from (2) be as follows:
(3)
The set of nonlinear transcendental equations (3) can be
solved by an iterative method such as the Newton–Raphson
method. For example, using a modulation index
of 0.8
obtains
This means that, if the inverter output is symmetrically
switched during the positive half cycle of the fundamental
voltage to
at 6.57 , at 18.94 , at 27.18 ,
at 45.14 , and at 62.24 , and similarly in the
negative half cycle to
at 186.57 , at 198.94 ,
at 207.18 , at 225.14 , and at 242.24 ,
the output voltage of the 11-level inverter will not contain the
5th, 7th, 11th, and 13th harmonic components.
From Fig. 2, note that the duty cycle for each of the voltage
levels is different. If this same pattern of duty cycles is used
on a motor drive continuously, then the level-1 battery (or
other SDCS) is cycled on for a much longer duration than
the level-5 battery. This means that the level-1 battery will
discharge much sooner than the level-5 battery. However, by
using a switching pattern-swapping scheme among the various
levels every 1/2 cycle, as shown in Fig. 3, all batteries will be
equally used (discharged) or charged.
The combination of the 180
conducting method [Fig. 2(b)]
and the pattern-swapping scheme (Fig. 3) make the cascade
inverter’s voltage and current stresses the same and keeps
the batteries’ charge state balanced. Identical H-bridge in-
verter units can be utilized, thus improving modularity and
manufacturability and greatly reducing production costs.
B. Three-Phase Motor Drive
For a three-phase system, the output voltages of three single-
phase cascaded inverters can be connected in either a wye or
delta configuration. Fig. 4 illustrates the connection diagram
for a wye-configured 11-level converter using cascaded invert-
ers with five SDCS’s per phase. In the motoring mode, power
flows from the batteries through the cascade inverters to the
motor. In the charging mode, the cascade converters act as
rectifiers, and power flows from the charger (ac source) to the
batteries.
Fig. 5 shows the system configuration and control block
diagram of an ASD using an 11-level cascade inverter. The
duty cycle lookup table contains switching timings to generate
the desired output voltage, as shown in Fig. 2. The five
switching angles
are calculated off-line
to minimize harmonics for each modulation index,
.
A prototype three-phase 11-level wye-connected cascaded
inverter has been built using insulated gate bipolar transistors
(IGBT’s) as the switching devices. A battery bank of 15
SDCS’s of 48 Vdc each fed the inverter (5 SDCS’s per phase).
The control of the inverter was via a 32-bit digital signal
processor. The switching timing angles
were calculated off-line for the following modulation indexes:
. A table of ten switching patterns
corresponding to these modulation indexes was stored in
TOLBERT et al.: MULTILEVEL CONVERTERS FOR LARGE ELECTRIC DRIVES 39
Fig. 3. Switching pattern swapping of the 11-level cascade inverter for balancing battery charge.
Fig. 4. System configuration of an EV motor drive using a cascade inverter.
the controller as 1024 states per cycle. A constant volt-
age/frequency control technique was applied to the motor drive
system. As a user interface, a potentiometer was adjusted
to apply an external 0–3-V signal to the controller. The
0–3-V signal mapped directly to a 0–60-Hz fundamental
frequency for the gate signals sent to the inverter. Also,
the switching patterns corresponding to the various modula-
tion indexes were mapped from the 0–3-V external control
signal.
Fig. 6 shows experimental waveforms of the 11-level
battery-fed cascade inverter prototype driving a 208-V three-
phase induction motor at 50% and 80% rated speed using the
aforementioned fundamental frequency switching scheme. As
can be seen from the waveforms, both the line–line voltage
and current are almost sinusoidal. EMI and common-mode
voltage are also much less than what would result from a
two-level PWM inverter because of the inherently low
(21 times less than a two-level drive) and sinusoidal voltage
output.
Fig. 5. System configuration of an ASD using the cascade inverter.
III. BACK-TO-BACK DIODE-CLAMPED CONVERTER DRIVE
While cascade inverters are ideal where separate dc sources
are available, in most instances, an ac voltage source is the
only convenient power supply. For these cases, a multilevel
back-to-back diode-clamped converter can best interface with
the source of ac power and yet still meet the high-power and/or
high-voltage requirements of the driven motor.
Two six-level diode-clamped inverters connected back-to-
back are shown in Fig. 7. The dc bus for these two in-
verters consists of a series of electric energy storage de-
vices—batteries or capacitors. The voltage across each storage
device is
. The voltage stress across each switching device
is limited to
through the clamping diodes.
A. General Structure and Operation
Table I lists the voltage output levels possible for one phase
of the diode-clamped inverter using the negative dc rail
as
a reference voltage. State condition 1 means the corresponding
40 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 35, NO. 1, JANUARY/FEBRUARY 1999
(a)
(b)
Fig. 6. Experimental waveforms of a battery-fed cascade inverter prototype
driving an induction motor at (a) 50% rated speed and (b) 80% rated speed.
switch is on, and 0 means the switch is off. Note that each
active device is only switched once per cycle. Each phase
has five complementary switch pairs such that turning on one
of the switches of the pair requires that the other switch be
turned off. The complementary switch pairs for phase leg
are , and
.
Fig. 8 shows the voltage waveform for one phase of a six-
level inverter. The line voltage
consists of a phase-leg
voltage and a phase-leg voltage. The resulting line voltage
is an 11-level staircase waveform. This means that an
-level
diode-clamped inverter has an
-level output phase voltage
and a
-level output line voltage [15].
Although each active switching device is only required to
block a voltage level of
, the clamping diodes require
different voltage ratings for reverse voltage blocking. Using
phase
of Fig. 7 as an example, when all the lower switches
– are turned on, must block four voltage levels,
or
. Similarly, must block , must block
, and must block . If the inverter is designed
such that each blocking diode has the same voltage rating
as the active switches,
will require diodes in series;
consequently, the number of diodes required for each phase
is
. Thus, the number of blocking diodes
are quadratically related to the number of levels in a diode-
clamped converter [13]–[15].
B. Experimental Results
A six-level back-to-back 10-kW diode-clamped converter
prototype that was designed to operate at a three-phase line
voltage of 208 V has been built and experimentally tested as an
ASD for an induction motor load. The controllable switching
devices used for the converter were 100-V 100-A MOSFET’s.
Each internal dc level of the converter had a capacitance of
6.72 mF.
Fig. 9 shows the source voltage
, the source current
, drawn by the converter, the inverter output load voltage
, and the load current , drawn by a 5-hp induction
motor operating at 75% rated speed. This prototype diode-
clamped rectifier drew a source current that had a THD of 3%
and could be controlled such that the input power factor was
1.0. The output voltage at the motor terminals had a THD that
varied between 4.5%–5.3%, and the converter output current
had a THD of 3%.
Additionally, the experiment shows that the output line
voltage
is reduced by 11 times with the six-level
converter as compared to a traditional two-level PWM drive.
The dramatic reduction in
by one order in magnitude
and two orders in repetition (switching frequency) can prevent
motor windings and bearings from failure. This 11-step stair-
case output voltage waveform approaches a sinewave, thus
having no common-mode voltage and no voltage surge to the
motor windings.
C. Efficiency
To compare the efficiencies of a multilevel inverter oper-
ating with fundamental frequency switching and a two-level
inverter using PWM, the losses in the two inverters have to
be characterized.
The losses in an inverter can be described by
(4)
where
is the conducting loss and is the switching loss.
In the fundamental frequency-controlled multilevel inverter,
the switching power losses can be approximated by
-
(5)
where
is the frequency of the modulation, or reference,
waveform. The switching power losses in a two-level PWM
inverter can be approximated by
-
(6)
where
is the frequency of the PWM carrier waveform [21].
If
and are assumed to be the same for the active devices
in the multilevel inverter and two-level PWM inverter, the
difference in (5) and (6) is the factor
, which is known as
