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Computational analysis and performance evaluation of representative wafer scale integration interconnections

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TLDR
In this paper, the electrical performance of wafer-scale integration interconnections was studied, with an emphasis on the characteristic impedance, based on closed-form expressions, finite difference method models, commercially available microwave circuit analysis software, and a numerical evaluation of the Telegrapher equations.
Abstract
The electrical performance of wafer-scale integration interconnections was studied, with an emphasis on the characteristic impedance. The study was based on closed-form expressions, finite difference method models, commercially available microwave circuit analysis software, and a numerical evaluation of the Telegrapher equations. Measurements were conducted on 5-in-diameter test wafers which contained numerous interconnection structures. The results revealed interesting information concerning the driving-point impedances of the structures, the inadequacy of closed-form models for accurate estimation, and the need for more accurate modeling techniques. >

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Silicon Hybrid Wafer Scale Integration Interconnect Evaluation

James C Lyke
TL;DR: In this article, the electrical characteristics of interconnections that have been proposed for use in silicon hybrid wafer scale integration (WSI) approaches were investigated, using a set of five-inch test wafers, containing various interconnection structures previously designed at AFIT.
References
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Journal ArticleDOI

The Numerical Solution of Some Important Transmission-Line Problems

TL;DR: In this article, the generalized numerical solution of Laplace's equation in two dimensions is dealt with, subject to boundary conditions imposed by conducting surfaces and dielectrics which are permitted a limited amount of inhomogeneity.
Journal ArticleDOI

Analytical IC Metal-Line Capacitance Formulas (Short Papers)

TL;DR: In this article, two analytical capacitance formulas were derived using approximate conformal mapping techniques, one gives the capacitance of a finite-thickness metal line over a conducting ground plane, or over a silicon surface.

Silicon Hybrid Wafer Scale Integration Interconnect Evaluation

James C Lyke
TL;DR: In this article, the electrical characteristics of interconnections that have been proposed for use in silicon hybrid wafer scale integration (WSI) approaches were investigated, using a set of five-inch test wafers, containing various interconnection structures previously designed at AFIT.
Proceedings ArticleDOI

MIL-H-38534: military specification for hybrid microcircuits

TL;DR: The MIL-H-38534 specification as mentioned in this paper provides hybrid micro-circuit manufacturers with the first specification for hybrid microcircuit devices only, based on MIL-M-38510 and MIL-STD-1772.
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