Proceedings ArticleDOI
CryptoManiac: a fast flexible architecture for secure communication
Lisa Wu,Christopher T. Weaver,Todd Austin +2 more
- Vol. 29, Iss: 2, pp 110-119
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TLDR
The CryptoManiac processor is introduced, a fast and flexible co-processor for cryptographic workloads that rivals a state-of-the-art dedicated hardware implementation of the 3DES (triple DES) algorithm, while retaining the flexibility to simultaneously support multiple cipher algorithms.Abstract:
The growth of the Internet as a vehicle for secure communication and electronic commerce has brought cryptographic processing performance to the forefront of high throughput system design. This trend will be further underscored with the widespread adoption of secure protocols such as secure IP (IPSEC) and virtual private networks (VPNs).In this paper, we introduce the CryptoManiac processor, a fast and flexible co-processor for cryptographic workloads. Our design is extremely efficient; we present analysis of a 0.25um physical design that runs the standard Rijndael cipher algorithm 2.25 times faster than a 600MHz Alpha 21264 processor. Moreover, our implementation requires 1/100th the area and power in the same technology. We demonstrate that the performance of our design rivals a state-of-the-art dedicated hardware implementation of the 3DES (triple DES) algorithm, while retaining the flexibility to simultaneously support multiple cipher algorithms. Finally, we define a scalable system architecture that combines CryptoManiac processing elements to exploit inter-session and inter-packet parallelism available in many communication protocols. Using I/O traces and detailed timing simulation, we show that chip multiprocessor configurations can effectively service high throughput applications including secure web and disk I/O processing.read more
Citations
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Security as a new dimension in embedded system design
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Conservation cores: reducing the energy of mature computations
Ganesh Venkatesh,Jack Sampson,Nathan Goulding,Saturnino Garcia,Vladyslav Bryksin,Jose Lugo-Martinez,Steven Swanson,Michael Taylor +7 more
TL;DR: A toolchain for automatically synthesizing c-cores from application source code is presented and it is demonstrated that they can significantly reduce energy and energy-delay for a wide range of applications, and patching can extend the useful lifetime of individual c-Cores to match that of conventional processors.
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Programming by sketching for bit-streaming programs
TL;DR: StreamBit is developed as a sketching methodology for the important class of bit-streaming programs (e.g., coding and cryptography), which allows a programmer to write clean and portable reference code, and then obtain a high-quality implementation by simply sketching the outlines of the desired implementation.
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Processor acceleration through automated instruction set customization
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Fast secure processor for inhibiting software piracy and tampering
Jun Yang,Youtao Zhang,Lan Gao +2 more
TL;DR: This paper presents an innovative technique in which the cryptography computation is shifted off from thememory access critical path, namely "one-time pad" encryption, which improves the execution speed of the XOM architecture by 34.7% at maximum.
References
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Book
Computer Architecture: A Quantitative Approach
TL;DR: This best-selling title, considered for over a decade to be essential reading for every serious student and practitioner of computer design, has been updated throughout to address the most important trends facing computer designers today.
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