Proceedings ArticleDOI
CSST: An Efficient Secure Split-Test for Preventing IC Piracy
Md. Tauhidur Rahman,Domenic Forte,Quihang Shi,Gustavo K. Contreras,Mohammad Tehranipoor +4 more
- pp 43-47
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TLDR
A new Secure Split-Test is proposed to give control over testing back to the IP owner to prevent shipping overproduction and defective chips from reaching the supply chain and considerably simplifies the communication required between foundry and IP owner.Abstract:
With the high costs associated with modern IC fabrication, most semiconductor companies have gone fabless, i.e., they outsource manufacturing of their designs to contract foundries. This horizontal business model has led to many well documented issues associated with untrusted foundries including IC overproduction and shipping improperly or insufficiently tested chips. Entering such chips in the supply chain can be catastrophic for critical applications. We propose a new Secure Split-Test to give control over testing back to the IP owner. Each chip is locked during test. The IP owner is the only entity who can interpret the locked test results and unlock passing chips. In this way, SST can prevent shipping overproduction and defective chips from reaching the supply chain. The proposed method considerably simplifies the communication required between the foundry and IP owner compared to the original version of the secure split test. The results demonstrate that our new technique is more secure than the original and with less communication barriers.read more
Citations
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Proceedings ArticleDOI
CSST: Preventing distribution of unlicensed and rejected ICs by untrusted foundry and assembly
TL;DR: A new Secure Split-Test (SST) scheme called the Connecticut SST (CSST) in which the IP owner takes full control over testing is proposed, which is more secure than the original and has lower communication overheads.
Journal ArticleDOI
Development and Evaluation of Hardware Obfuscation Benchmarks
TL;DR: A set of well-defined benchmarks obfuscated with some popular methods that are made publicly available and provide the first evaluation of several obfuscation approaches based on the metrics and existing attacks using this new suite.
Proceedings ArticleDOI
TGA: An Oracle-less and Topology-Guided Attack on Logic Locking
TL;DR: This paper presents a novel oracle-less and topology-guided attack denoted as TGA, which relies on identifying repeated functions for determining the value of a key bit and presents a solution to thwart TGA and make logic locking secure.
Proceedings ArticleDOI
Exploiting DRAM Latency Variations for Generating True Random Numbers
TL;DR: The silicon results from Samsung and Micron DDR3 DRAM modules show that the proposed DRAM-latency based TRNG is robust (against different operating conditions and environmental variations) and acceptably fast.
Proceedings ArticleDOI
Comparative Analysis of Hardware Obfuscation for IP Protection
TL;DR: This paper presents an overview of obfuscation techniques and a qualitative comparison of the two major types, Sequential and combinational obfuscation, and proposes multiple methods for each type.
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