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Degradation of thin tunnel gate oxide under constant Fowler-Nordheim current stress for a flash EEPROM

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TLDR
In this article, the degradation of thin tunnel gate oxide under constant Fowler-Nordheim (FN) current stress was studied using flash EEPROM structures and the degradation is a strong function of the amount of injected charge density (Q/sub inj/), oxide thickness, and the direction of stress.
Abstract
The degradation of thin tunnel gate oxide under constant Fowler-Nordheim (FN) current stress was studied using flash EEPROM structures. The degradation is a strong function of the amount of injected charge density (Q/sub inj/), oxide thickness, and the direction of stress. Positive charge trapping is usually dominant at low Q/sub inj/ followed by negative charge trapping at high Q/sub inj/, causing a turnaround of gate voltage and threshold voltage. Interface trap generation continues to increase with increasing stress, as evidenced by subthreshold slope and transconductance. Gate injection stress creates more positive charge traps and interface traps than does substrate injection stress. Oxide degradation gets more severe for thicker oxide, due to more oxide charge trapping and interface trap generation by impact ionization. A simple model of oxide degradation and breakdown was established based on the experimental results. It indicates that the damage in the oxide is more serious near the anode interface by impact ionization and oxide breakdown is also closely related to surface roughness at the cathode interface. When all the damage sites in the oxide connect and a conductive path between cathode and anode is formed, oxide breakdown occurs. The damage is more serious for thicker oxide because a thicker oxide is more susceptible to impact ionization.

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Citations
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Journal ArticleDOI

Effects of interface trap generation and annihilation on the data retention characteristics of flash memory cells

TL;DR: In this article, a new interface trap analysis method using the hysteresis of the I/sub d/--V/sub g/ curve is proposed and shows that the interface traps consist of fast traps and slow traps.
Journal ArticleDOI

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

TL;DR: The state-of-the-art in the understanding of planar NAND Flash memory reliability is reviewed and how the recent move to three-dimensional (3D) devices has affected this field is discussed.
Proceedings Article

How i learned to stop worrying and love flash endurance

TL;DR: This paper model the physical processes that affect endurance, which include both stresses to the memory cells as well as a recovery process, and indicates that SSDs that use standard wear-leveling techniques are much more resilient under realistic operating conditions than previously assumed.
Journal ArticleDOI

Nitrogen-enhanced negative bias temperature instability: An insight by experiment and first-principle calculations

TL;DR: In this paper, the nitrogen-enhanced negative bias temperature instability (NBTI) effect has been studied experimentally and theoretically and it is observed that both the interface state and positive fixed charge generation increase linearly with interfacial nitrogen concentration.
Journal ArticleDOI

Data retention characteristics of sub-100 nm NAND flash memory cells

TL;DR: Comparison of interface states and stress-induced leakage current (SILC) component during retention mode shows that the annihilation of Interface state generation rate increases rapidly as the channel width of NAND flash cell decreases.
References
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Proceedings Article

Physics of semiconductor devices

S. M. Sze
Book

Semiconductor Material and Device Characterization

TL;DR: In this article, the authors present a characterization of the resistivity of a two-point-versus-four-point probe in terms of the number of contacts and the amount of contacts in the probe.
Book

Silicon-on-Insulator Technology: Materials to VLSI

TL;DR: In this paper, the authors present a set of techniques for defect detection in SOI materials, including the following: 2.1.1 Silicon-on-Zirconia (SOZ), 2.2.2 E-beam recrystallization, 2.3.3, 3.4.4, and 3.5.5 Other defect assessment techniques.
Journal ArticleDOI

Impact ionization, trap creation, degradation, and breakdown in silicon dioxide films on silicon

TL;DR: In this article, two mechanisms triggered by electron heating in the oxide conduction band are discussed: trap creation and band gap ionization by carriers with energies exceeding 2 and 9 eV, respectively.
Journal ArticleDOI

Simple technique for separating the effects of interface traps and trapped‐oxide charge in metal‐oxide‐semiconductor transistors

TL;DR: In this article, a new technique is presented for separating the threshold voltage shift of a metaloxide-semiconductor transistor into shifts due to interface traps and trappedoxide charge, which is applied to threshold voltage shifts on an n-channel transistor that result from ionizing radiation.
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